Gustavo G Ramallo
Examiner (ID: 10049, Phone: (571)272-9227 , Office: P/2819 )
Most Active Art Unit | 2819 |
Art Unit(s) | 2819, 2812, 2826 |
Total Applications | 584 |
Issued Applications | 491 |
Pending Applications | 65 |
Abandoned Applications | 28 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4110431
[patent_doc_number] => 06134662
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-17
[patent_title] => 'Physical layer security manager for memory-mapped serial communications interface'
[patent_app_type] => 1
[patent_app_number] => 9/105553
[patent_app_country] => US
[patent_app_date] => 1998-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 13356
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/134/06134662.pdf
[firstpage_image] =>[orig_patent_app_number] => 105553
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/105553 | Physical layer security manager for memory-mapped serial communications interface | Jun 25, 1998 | Issued |
Array
(
[id] => 4177248
[patent_doc_number] => 06158023
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-05
[patent_title] => 'Debug apparatus'
[patent_app_type] => 1
[patent_app_number] => 9/084511
[patent_app_country] => US
[patent_app_date] => 1998-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4289
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/158/06158023.pdf
[firstpage_image] =>[orig_patent_app_number] => 084511
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/084511 | Debug apparatus | May 25, 1998 | Issued |
Array
(
[id] => 4257994
[patent_doc_number] => 06145085
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-07
[patent_title] => 'Method and apparatus for providing remote access to security features on a computer network'
[patent_app_type] => 1
[patent_app_number] => 9/070458
[patent_app_country] => US
[patent_app_date] => 1998-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 18
[patent_no_of_words] => 10410
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/145/06145085.pdf
[firstpage_image] =>[orig_patent_app_number] => 070458
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/070458 | Method and apparatus for providing remote access to security features on a computer network | Apr 29, 1998 | Issued |
Array
(
[id] => 4156586
[patent_doc_number] => 06122753
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-19
[patent_title] => 'Fault recovery system and transmission path autonomic switching system'
[patent_app_type] => 1
[patent_app_number] => 9/056866
[patent_app_country] => US
[patent_app_date] => 1998-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 35
[patent_no_of_words] => 17038
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/122/06122753.pdf
[firstpage_image] =>[orig_patent_app_number] => 056866
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/056866 | Fault recovery system and transmission path autonomic switching system | Apr 7, 1998 | Issued |
Array
(
[id] => 4177799
[patent_doc_number] => 06105149
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-15
[patent_title] => 'System and method for diagnosing and validating a machine using waveform data'
[patent_app_type] => 1
[patent_app_number] => 9/050143
[patent_app_country] => US
[patent_app_date] => 1998-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5696
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/105/06105149.pdf
[firstpage_image] =>[orig_patent_app_number] => 050143
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/050143 | System and method for diagnosing and validating a machine using waveform data | Mar 29, 1998 | Issued |
Array
(
[id] => 4178435
[patent_doc_number] => 06108799
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-22
[patent_title] => 'Automated sample creation of polymorphic and non-polymorphic marcro viruses'
[patent_app_type] => 1
[patent_app_number] => 9/041493
[patent_app_country] => US
[patent_app_date] => 1998-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 7212
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/108/06108799.pdf
[firstpage_image] =>[orig_patent_app_number] => 041493
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/041493 | Automated sample creation of polymorphic and non-polymorphic marcro viruses | Mar 11, 1998 | Issued |
Array
(
[id] => 4206991
[patent_doc_number] => 06131164
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-10
[patent_title] => 'Reverse internet protocol lookup'
[patent_app_type] => 1
[patent_app_number] => 9/032330
[patent_app_country] => US
[patent_app_date] => 1998-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2294
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/131/06131164.pdf
[firstpage_image] =>[orig_patent_app_number] => 032330
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/032330 | Reverse internet protocol lookup | Feb 26, 1998 | Issued |
Array
(
[id] => 4255665
[patent_doc_number] => 06119245
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Semiconductor storage device and method of controlling it'
[patent_app_type] => 1
[patent_app_number] => 9/028130
[patent_app_country] => US
[patent_app_date] => 1998-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 8883
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/119/06119245.pdf
[firstpage_image] =>[orig_patent_app_number] => 028130
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/028130 | Semiconductor storage device and method of controlling it | Feb 22, 1998 | Issued |
Array
(
[id] => 4257536
[patent_doc_number] => 06081908
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Test method of one chip micro-computer and one chip micro-computer for conducting the test'
[patent_app_type] => 1
[patent_app_number] => 9/015400
[patent_app_country] => US
[patent_app_date] => 1998-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 8241
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/081/06081908.pdf
[firstpage_image] =>[orig_patent_app_number] => 015400
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/015400 | Test method of one chip micro-computer and one chip micro-computer for conducting the test | Jan 28, 1998 | Issued |
Array
(
[id] => 4257348
[patent_doc_number] => 06081897
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Apparatus for monitoring and preventing unauthorized copying of digital data'
[patent_app_type] => 1
[patent_app_number] => 9/006183
[patent_app_country] => US
[patent_app_date] => 1998-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 2
[patent_no_of_words] => 2727
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/081/06081897.pdf
[firstpage_image] =>[orig_patent_app_number] => 006183
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/006183 | Apparatus for monitoring and preventing unauthorized copying of digital data | Jan 12, 1998 | Issued |
Array
(
[id] => 4257393
[patent_doc_number] => 06081899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Time stamp authority hierarchy protocol and associated validating system'
[patent_app_type] => 1
[patent_app_number] => 9/005321
[patent_app_country] => US
[patent_app_date] => 1998-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2307
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/081/06081899.pdf
[firstpage_image] =>[orig_patent_app_number] => 005321
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/005321 | Time stamp authority hierarchy protocol and associated validating system | Jan 8, 1998 | Issued |
Array
(
[id] => 4423572
[patent_doc_number] => 06311274
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-30
[patent_title] => 'Network alert handling system and method'
[patent_app_type] => 1
[patent_app_number] => 8/990452
[patent_app_country] => US
[patent_app_date] => 1997-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4174
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/311/06311274.pdf
[firstpage_image] =>[orig_patent_app_number] => 990452
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/990452 | Network alert handling system and method | Dec 14, 1997 | Issued |
Array
(
[id] => 4280423
[patent_doc_number] => 06205561
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Tracking and managing failure-susceptible operations in a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/989147
[patent_app_country] => US
[patent_app_date] => 1997-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 6245
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/205/06205561.pdf
[firstpage_image] =>[orig_patent_app_number] => 989147
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/989147 | Tracking and managing failure-susceptible operations in a computer system | Dec 10, 1997 | Issued |