Search

Kakali Chaki

Supervisory Patent Examiner (ID: 12745, Phone: (571)272-3719 , Office: P/2122 )

Most Active Art Unit
2122
Art Unit(s)
2124, 2100, 2764, 2122, 2762, 2307, 2316, 2193, 2755, 2899
Total Applications
573
Issued Applications
396
Pending Applications
50
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3705722 [patent_doc_number] => 05646430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Non-volatile memory cell having lightly-doped source region' [patent_app_type] => 1 [patent_app_number] => 8/520350 [patent_app_country] => US [patent_app_date] => 1995-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 3145 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646430.pdf [firstpage_image] =>[orig_patent_app_number] => 520350 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/520350
Non-volatile memory cell having lightly-doped source region Aug 27, 1995 Issued
Array ( [id] => 3586156 [patent_doc_number] => 05581110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Integrated circuit with trenches and an oxygen barrier layer' [patent_app_type] => 1 [patent_app_number] => 8/516114 [patent_app_country] => US [patent_app_date] => 1995-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4015 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581110.pdf [firstpage_image] =>[orig_patent_app_number] => 516114 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/516114
Integrated circuit with trenches and an oxygen barrier layer Aug 16, 1995 Issued
Array ( [id] => 3496284 [patent_doc_number] => 05536955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Electronic devices for use in generating integrated circuit structures and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/494926 [patent_app_country] => US [patent_app_date] => 1995-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 82 [patent_no_of_words] => 8519 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/536/05536955.pdf [firstpage_image] =>[orig_patent_app_number] => 494926 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/494926
Electronic devices for use in generating integrated circuit structures and method therefor Jun 25, 1995 Issued
Array ( [id] => 3565845 [patent_doc_number] => 05544095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Rom cell for a multiport memory and method' [patent_app_type] => 1 [patent_app_number] => 8/450879 [patent_app_country] => US [patent_app_date] => 1995-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 36 [patent_no_of_words] => 5096 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544095.pdf [firstpage_image] =>[orig_patent_app_number] => 450879 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/450879
Rom cell for a multiport memory and method May 25, 1995 Issued
Array ( [id] => 3662858 [patent_doc_number] => 05591998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/443106 [patent_app_country] => US [patent_app_date] => 1995-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 42 [patent_no_of_words] => 12405 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/591/05591998.pdf [firstpage_image] =>[orig_patent_app_number] => 443106 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/443106
Semiconductor memory device May 16, 1995 Issued
Array ( [id] => 3520147 [patent_doc_number] => 05576569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Electrically programmable and erasable memory device with depression in lightly-doped source' [patent_app_type] => 1 [patent_app_number] => 8/427208 [patent_app_country] => US [patent_app_date] => 1995-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2486 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576569.pdf [firstpage_image] =>[orig_patent_app_number] => 427208 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/427208
Electrically programmable and erasable memory device with depression in lightly-doped source Apr 23, 1995 Issued
Array ( [id] => 3548558 [patent_doc_number] => 05554869 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Electrically programmable read-only memory array' [patent_app_type] => 1 [patent_app_number] => 8/423068 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3413 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/554/05554869.pdf [firstpage_image] =>[orig_patent_app_number] => 423068 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/423068
Electrically programmable read-only memory array Apr 16, 1995 Issued
Array ( [id] => 3520109 [patent_doc_number] => 05576566 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Semiconductor trench capacitor cell having a buried strap' [patent_app_type] => 1 [patent_app_number] => 8/421714 [patent_app_country] => US [patent_app_date] => 1995-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3491 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576566.pdf [firstpage_image] =>[orig_patent_app_number] => 421714 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/421714
Semiconductor trench capacitor cell having a buried strap Apr 12, 1995 Issued
Array ( [id] => 3671859 [patent_doc_number] => 05600161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-04 [patent_title] => 'Sub-micron diffusion area isolation with Si-SEG for a DRAM array' [patent_app_type] => 1 [patent_app_number] => 8/410176 [patent_app_country] => US [patent_app_date] => 1995-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1424 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/600/05600161.pdf [firstpage_image] =>[orig_patent_app_number] => 410176 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/410176
Sub-micron diffusion area isolation with Si-SEG for a DRAM array Mar 23, 1995 Issued
Array ( [id] => 3571259 [patent_doc_number] => RE035356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'EEPROM cell array with tight erase distribution' [patent_app_type] => 2 [patent_app_number] => 8/407527 [patent_app_country] => US [patent_app_date] => 1995-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/035/RE035356.pdf [firstpage_image] =>[orig_patent_app_number] => 407527 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/407527
EEPROM cell array with tight erase distribution Mar 16, 1995 Issued
Array ( [id] => 3575533 [patent_doc_number] => 05539230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Chimney capacitor' [patent_app_type] => 1 [patent_app_number] => 8/405164 [patent_app_country] => US [patent_app_date] => 1995-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3603 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539230.pdf [firstpage_image] =>[orig_patent_app_number] => 405164 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/405164
Chimney capacitor Mar 15, 1995 Issued
Array ( [id] => 3699801 [patent_doc_number] => 05596213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Shallow trench source EPROM cell' [patent_app_type] => 1 [patent_app_number] => 8/403328 [patent_app_country] => US [patent_app_date] => 1995-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2583 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596213.pdf [firstpage_image] =>[orig_patent_app_number] => 403328 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/403328
Shallow trench source EPROM cell Mar 13, 1995 Issued
Array ( [id] => 3517978 [patent_doc_number] => 05512774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Dielectrically isolated substrate and semiconductor device using the same' [patent_app_type] => 1 [patent_app_number] => 8/396964 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 90 [patent_no_of_words] => 11909 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/512/05512774.pdf [firstpage_image] =>[orig_patent_app_number] => 396964 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/396964
Dielectrically isolated substrate and semiconductor device using the same Feb 28, 1995 Issued
Array ( [id] => 3511079 [patent_doc_number] => 05569945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Stepped floating gate EPROM device' [patent_app_type] => 1 [patent_app_number] => 8/387440 [patent_app_country] => US [patent_app_date] => 1995-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/569/05569945.pdf [firstpage_image] =>[orig_patent_app_number] => 387440 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/387440
Stepped floating gate EPROM device Feb 12, 1995 Issued
Array ( [id] => 3593113 [patent_doc_number] => 05497017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'Dynamic random access memory array having a cross-point layout, tungsten digit lines buried in the substrate, and vertical access transistors' [patent_app_type] => 1 [patent_app_number] => 8/378424 [patent_app_country] => US [patent_app_date] => 1995-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 3772 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/497/05497017.pdf [firstpage_image] =>[orig_patent_app_number] => 378424 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/378424
Dynamic random access memory array having a cross-point layout, tungsten digit lines buried in the substrate, and vertical access transistors Jan 25, 1995 Issued
Array ( [id] => 3554419 [patent_doc_number] => 05572056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'High density ROM' [patent_app_type] => 1 [patent_app_number] => 8/368146 [patent_app_country] => US [patent_app_date] => 1994-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 4801 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572056.pdf [firstpage_image] =>[orig_patent_app_number] => 368146 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/368146
High density ROM Dec 28, 1994 Issued
Array ( [id] => 3612381 [patent_doc_number] => 05589699 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Electrically erasable programmable non-volatile semiconductor memory device having select gates and small number of contact holes' [patent_app_type] => 1 [patent_app_number] => 8/359660 [patent_app_country] => US [patent_app_date] => 1994-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 78 [patent_no_of_words] => 10867 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/589/05589699.pdf [firstpage_image] =>[orig_patent_app_number] => 359660 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/359660
Electrically erasable programmable non-volatile semiconductor memory device having select gates and small number of contact holes Dec 19, 1994 Issued
Array ( [id] => 3530420 [patent_doc_number] => 05541425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-30 [patent_title] => 'Semiconductor device having trench structure' [patent_app_type] => 1 [patent_app_number] => 8/359142 [patent_app_country] => US [patent_app_date] => 1994-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 61 [patent_no_of_words] => 13225 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/541/05541425.pdf [firstpage_image] =>[orig_patent_app_number] => 359142 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/359142
Semiconductor device having trench structure Dec 18, 1994 Issued
Array ( [id] => 3517883 [patent_doc_number] => 05512767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Trench capacitor field shield with sidewall contact' [patent_app_type] => 1 [patent_app_number] => 8/355942 [patent_app_country] => US [patent_app_date] => 1994-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 37 [patent_no_of_words] => 7177 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/512/05512767.pdf [firstpage_image] =>[orig_patent_app_number] => 355942 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/355942
Trench capacitor field shield with sidewall contact Dec 12, 1994 Issued
Array ( [id] => 3509228 [patent_doc_number] => 05514890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Electrically erasable programmable memory device with improved erase and write operation' [patent_app_type] => 1 [patent_app_number] => 8/354372 [patent_app_country] => US [patent_app_date] => 1994-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2966 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/514/05514890.pdf [firstpage_image] =>[orig_patent_app_number] => 354372 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/354372
Electrically erasable programmable memory device with improved erase and write operation Dec 11, 1994 Issued
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