Search

Thomas K Pham

Supervisory Patent Examiner (ID: 12848, Phone: (571)272-3689 , Office: P/2872 )

Most Active Art Unit
2121
Art Unit(s)
4148, 2121, 2872, 2191
Total Applications
564
Issued Applications
434
Pending Applications
19
Abandoned Applications
111

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18813584 [patent_doc_number] => 20230387921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => ADJUSTABLE PHASE LOCKED LOOP [patent_app_type] => utility [patent_app_number] => 18/448319 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448319 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448319
ADJUSTABLE PHASE LOCKED LOOP Aug 10, 2023 Pending
Array ( [id] => 18813581 [patent_doc_number] => 20230387918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => Systems and Methods for Phase Locked Loop Realignment With Skew Cancellation [patent_app_type] => utility [patent_app_number] => 18/446881 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446881 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446881
Systems and Methods for Phase Locked Loop Realignment With Skew Cancellation Aug 8, 2023 Pending
Array ( [id] => 18600784 [patent_doc_number] => 20230275587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SELF-REFERENCED DELAY CELL-BASED TIME-TO-DIGITAL CONVERTER [patent_app_type] => utility [patent_app_number] => 18/144967 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18144967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/144967
SELF-REFERENCED DELAY CELL-BASED TIME-TO-DIGITAL CONVERTER May 8, 2023 Pending
Array ( [id] => 18555939 [patent_doc_number] => 20230253956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => Extending On-Time for Power Converter Control [patent_app_type] => utility [patent_app_number] => 18/301529 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301529
Extending On-Time for Power Converter Control Apr 16, 2023 Pending
Array ( [id] => 19154230 [patent_doc_number] => 11979155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Semiconductor integrated circuit device and level shifter circuit [patent_app_type] => utility [patent_app_number] => 18/177558 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8424 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177558 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177558
Semiconductor integrated circuit device and level shifter circuit Mar 1, 2023 Issued
Array ( [id] => 18680995 [patent_doc_number] => 20230318658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => DEVICE COMPRISING A SYNCHRONIZATION CIRCUIT FOR PERFORMING NEAR FIELD COMMUNICATION [patent_app_type] => utility [patent_app_number] => 18/174236 [patent_app_country] => US [patent_app_date] => 2023-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18174236 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/174236
DEVICE COMPRISING A SYNCHRONIZATION CIRCUIT FOR PERFORMING NEAR FIELD COMMUNICATION Feb 23, 2023 Pending
Array ( [id] => 18653934 [patent_doc_number] => 20230299776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => FAST FREQUENCY HOPPING OF MODULATED SIGNALS [patent_app_type] => utility [patent_app_number] => 18/095472 [patent_app_country] => US [patent_app_date] => 2023-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095472 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/095472
FAST FREQUENCY HOPPING OF MODULATED SIGNALS Jan 9, 2023 Pending
Array ( [id] => 18307582 [patent_doc_number] => 20230111482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => Systems and Methods for Phase Locked Loop Realignment With Skew Cancellation [patent_app_type] => utility [patent_app_number] => 18/064313 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064313 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064313
Systems and methods for phase locked loop realignment with skew cancellation Dec 11, 2022 Issued
Array ( [id] => 18440849 [patent_doc_number] => 20230188145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => CLOCK BUFFER [patent_app_type] => utility [patent_app_number] => 18/070713 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070713 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/070713
CLOCK BUFFER Nov 28, 2022 Pending
Array ( [id] => 18437954 [patent_doc_number] => 20230185249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => USING TIME-TO-DIGITAL CONVERTERS TO DELAY SIGNALS WITH HIGH ACCURACY AND LARGE RANGE [patent_app_type] => utility [patent_app_number] => 17/990147 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3128 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17990147 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/990147
USING TIME-TO-DIGITAL CONVERTERS TO DELAY SIGNALS WITH HIGH ACCURACY AND LARGE RANGE Nov 17, 2022 Pending
Array ( [id] => 18395548 [patent_doc_number] => 20230163769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => LOW NOISE PHASE LOCK LOOP (PLL) CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/969251 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969251
LOW NOISE PHASE LOCK LOOP (PLL) CIRCUIT Oct 18, 2022
Array ( [id] => 18321390 [patent_doc_number] => 20230119518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => PHASE-LOCKED LOOP CIRCUIT AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/966463 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17966463 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/966463
PHASE-LOCKED LOOP CIRCUIT AND OPERATION METHOD THEREOF Oct 13, 2022 Pending
Array ( [id] => 19230201 [patent_doc_number] => 12009847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Split input amplifier for protection from DC offset [patent_app_type] => utility [patent_app_number] => 17/950053 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7630 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950053
SPLIT INPUT AMPLIFIER FOR PROTECTION FROM DC OFFSET Sep 20, 2022 Pending
Array ( [id] => 18705306 [patent_doc_number] => 11791828 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-17 [patent_title] => LC-tank-based phase-locked loop (LCPLL) [patent_app_type] => utility [patent_app_number] => 17/948910 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 13276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17948910 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/948910
LC-tank-based phase-locked loop (LCPLL) Sep 19, 2022 Issued
Array ( [id] => 19214139 [patent_doc_number] => 12003218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Mixer with filtering function and method for linearization of mixer [patent_app_type] => utility [patent_app_number] => 17/947192 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2735 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947192 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947192
Mixer with filtering function and method for linearization of mixer Sep 18, 2022 Issued
Array ( [id] => 18546717 [patent_doc_number] => 11720066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Time-to-digital converter and phase-locked loop [patent_app_type] => utility [patent_app_number] => 17/931970 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 18621 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931970 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931970
Time-to-digital converter and phase-locked loop Sep 13, 2022 Issued
Array ( [id] => 18424743 [patent_doc_number] => 20230179208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => CLOCK TRACKING CIRCUIT WITH DIGITAL INTEGRAL PATH TO PROVIDE CONTROL SIGNALS FOR DIGITAL AND ANALOG INTEGRAL INPUTS OF AN OSCILLATOR [patent_app_type] => utility [patent_app_number] => 17/823418 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823418
CLOCK TRACKING CIRCUIT WITH DIGITAL INTEGRAL PATH TO PROVIDE CONTROL SIGNALS FOR DIGITAL AND ANALOG INTEGRAL INPUTS OF AN OSCILLATOR Aug 29, 2022 Pending
Array ( [id] => 18984211 [patent_doc_number] => 11909406 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-20 [patent_title] => Ring oscillator phase-locked loop with digital phase noise suppression [patent_app_type] => utility [patent_app_number] => 17/893471 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9178 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893471 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893471
Ring oscillator phase-locked loop with digital phase noise suppression Aug 22, 2022 Issued
Array ( [id] => 18009567 [patent_doc_number] => 20220368334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => PHASE SYNCHRONIZATION CIRCUIT, TRANSMISSION AND RECEPTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/877481 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877481
Phase synchronization circuit, transmission and reception circuit, and semiconductor integrated circuit Jul 28, 2022 Issued
Array ( [id] => 18944337 [patent_doc_number] => 20240039476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SINGLE SIDEBAND MIXER [patent_app_type] => utility [patent_app_number] => 17/816106 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/816106
SINGLE SIDEBAND MIXER Jul 28, 2022 Pending
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