Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18727758 [patent_doc_number] => 20230342051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/343835 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/343835
Memory storage with selected performance mode Jun 28, 2023 Issued
Array ( [id] => 18819649 [patent_doc_number] => 20230393989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => TECHNIQUES FOR STORING DATA AND TAGS IN DIFFERENT MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 18/209967 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209967
Techniques for storing data and tags in different memory arrays Jun 13, 2023 Issued
Array ( [id] => 19369470 [patent_doc_number] => 12061552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Application of a default shared state cache coherency protocol [patent_app_type] => utility [patent_app_number] => 18/315806 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8910 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/315806
Application of a default shared state cache coherency protocol May 10, 2023 Issued
Array ( [id] => 18889477 [patent_doc_number] => 11868247 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-09 [patent_title] => Storage system with multiplane segments and cooperative flash management [patent_app_type] => utility [patent_app_number] => 18/124514 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 37326 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124514
Storage system with multiplane segments and cooperative flash management Mar 20, 2023 Issued
Array ( [id] => 19413331 [patent_doc_number] => 12079147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Memory device for efficiently determining whether to perform re-training operation and memory system including the same [patent_app_type] => utility [patent_app_number] => 18/170949 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 36 [patent_no_of_words] => 13705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/170949
Memory device for efficiently determining whether to perform re-training operation and memory system including the same Feb 16, 2023 Issued
Array ( [id] => 19212635 [patent_doc_number] => 12001698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Memory system and SoC including linear address remapping logic [patent_app_type] => utility [patent_app_number] => 18/105967 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7583 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18105967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/105967
Memory system and SoC including linear address remapping logic Feb 5, 2023 Issued
Array ( [id] => 18454358 [patent_doc_number] => 20230195638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => CACHE SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/067180 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16307 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067180 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/067180
CACHE SYSTEMS Dec 15, 2022 Pending
Array ( [id] => 18306476 [patent_doc_number] => 20230110376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => RESOURCE-AWARE COMPRESSION [patent_app_type] => utility [patent_app_number] => 18/058534 [patent_app_country] => US [patent_app_date] => 2022-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18058534 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/058534
Resource-aware compression Nov 22, 2022 Issued
Array ( [id] => 18364450 [patent_doc_number] => 20230146041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => NON-VOLATILE MEMORY DEVICE INCLUDING MULTI-STACK MEMORY BLOCK AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/052428 [patent_app_country] => US [patent_app_date] => 2022-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18052428 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/052428
Non-volatile memory device including multi-stack memory block and operating method thereof Nov 2, 2022 Issued
Array ( [id] => 19340586 [patent_doc_number] => 12050776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Apparatus with response completion pacing [patent_app_type] => utility [patent_app_number] => 18/049973 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049973 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049973
Apparatus with response completion pacing Oct 25, 2022 Issued
Array ( [id] => 18531892 [patent_doc_number] => 20230236964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => STORAGE CONTROLLER DEALLOCATING MEMORY BLOCK, METHOD OF OPERATING THE SAME, AND METHOD OF OPERATING STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/049380 [patent_app_country] => US [patent_app_date] => 2022-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049380 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049380
STORAGE CONTROLLER DEALLOCATING MEMORY BLOCK, METHOD OF OPERATING THE SAME, AND METHOD OF OPERATING STORAGE DEVICE INCLUDING THE SAME Oct 24, 2022 Pending
Array ( [id] => 18819399 [patent_doc_number] => 20230393739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => BIT ERROR MANAGEMENT IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/049121 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049121 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049121
BIT ERROR MANAGEMENT IN MEMORY DEVICES Oct 23, 2022 Pending
Array ( [id] => 19293138 [patent_doc_number] => 12032491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Method for remapping virtual address to physical address and address remapping unit [patent_app_type] => utility [patent_app_number] => 18/047784 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7112 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/047784
Method for remapping virtual address to physical address and address remapping unit Oct 18, 2022 Issued
Array ( [id] => 19293138 [patent_doc_number] => 12032491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Method for remapping virtual address to physical address and address remapping unit [patent_app_type] => utility [patent_app_number] => 18/047784 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7112 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/047784
Method for remapping virtual address to physical address and address remapping unit Oct 18, 2022 Issued
Array ( [id] => 19293138 [patent_doc_number] => 12032491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Method for remapping virtual address to physical address and address remapping unit [patent_app_type] => utility [patent_app_number] => 18/047784 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7112 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/047784
Method for remapping virtual address to physical address and address remapping unit Oct 18, 2022 Issued
Array ( [id] => 19293138 [patent_doc_number] => 12032491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Method for remapping virtual address to physical address and address remapping unit [patent_app_type] => utility [patent_app_number] => 18/047784 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7112 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/047784
Method for remapping virtual address to physical address and address remapping unit Oct 18, 2022 Issued
Array ( [id] => 18407660 [patent_doc_number] => 20230169013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => ADDRESS TRANSLATION CACHE AND SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/965700 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965700 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965700
ADDRESS TRANSLATION CACHE AND SYSTEM INCLUDING THE SAME Oct 12, 2022 Pending
Array ( [id] => 19506520 [patent_doc_number] => 12117940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Host address space identifier for non-uniform memory access locality in virtual machines [patent_app_type] => utility [patent_app_number] => 17/963001 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/963001
Host address space identifier for non-uniform memory access locality in virtual machines Oct 9, 2022 Issued
Array ( [id] => 19375376 [patent_doc_number] => 12066941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Method for executing atomic memory operations when contested [patent_app_type] => utility [patent_app_number] => 17/961146 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961146
Method for executing atomic memory operations when contested Oct 5, 2022 Issued
Array ( [id] => 18142484 [patent_doc_number] => 20230016328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SYSTEM AND METHOD FOR PROVIDING IN-STORAGE ACCELERATION (ISA) IN DATA STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 17/953011 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953011 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953011
System and method for providing in-storage acceleration (ISA) in data storage devices Sep 25, 2022 Issued
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