Fahd H Patel

Array ( [id] => 15638675 [patent_doc_number] => 10592331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Apparatus and method for an on-chip reliability controller [patent_app_type] => utility [patent_app_number] => 16/110381 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 14057 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15486413 [patent_doc_number] => 10558557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Computer system testing [patent_app_type] => utility [patent_app_number] => 16/056235 [patent_app_country] => US [patent_app_date] => 2018-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16056235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13449117 [patent_doc_number] => 20180276101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => SYSTEM AND METHOD FOR ANALYZING BIG DATA ACTIVITIES [patent_app_type] => utility [patent_app_number] => 15/989938 [patent_app_country] => US [patent_app_date] => 2018-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4669 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15989938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13351221 [patent_doc_number] => 20180227150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => GROUND SHORT CIRCUIT PORTION DETECTING APPARATUS, GROUND SHORT CIRCUIT PORTION DETECTING METHOD, AND COMPUTER-READABLE RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 15/887931 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15486257 [patent_doc_number] => 10558478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Specification-based computing system configuration [patent_app_type] => utility [patent_app_number] => 15/842436 [patent_app_country] => US [patent_app_date] => 2017-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13557 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15842436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15472805 [patent_doc_number] => 10552280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => In-band monitor in system management mode context for improved cloud platform availability [patent_app_type] => utility [patent_app_number] => 15/842611 [patent_app_country] => US [patent_app_date] => 2017-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 8537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15842611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14443693 [patent_doc_number] => 20190179720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => REDUCING SERVICE DISRUPTIONS IN A MICRO-SERVICE ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 15/834792 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13432651 [patent_doc_number] => 20180267868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => MAINTAINING SYSTEM RELIABILITY IN A CPU WITH CO-PROCESSORS [patent_app_type] => utility [patent_app_number] => 15/832251 [patent_app_country] => US [patent_app_date] => 2017-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12796915 [patent_doc_number] => 20180157474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => DISTRIBUTED PACKAGE MANAGEMENT USING META-SCHEDULING [patent_app_type] => utility [patent_app_number] => 15/829740 [patent_app_country] => US [patent_app_date] => 2017-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15829740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14384243 [patent_doc_number] => 20190166034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => PREDICTIVE ANALYTICS OF DEVICE PERFORMANCE [patent_app_type] => utility [patent_app_number] => 15/825447 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15825447 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13254991 [patent_doc_number] => 10140186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => Memory error recovery [patent_app_type] => utility [patent_app_number] => 15/806404 [patent_app_country] => US [patent_app_date] => 2017-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4309 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15806404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15638659 [patent_doc_number] => 10592323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Requesting manual intervention on failure of initial microcode load attempts during recovery of modified customer data [patent_app_type] => utility [patent_app_number] => 15/791367 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6504 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14192589 [patent_doc_number] => 20190116000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => TRANSPORT LAYER IDENTIFYING FAILURE CAUSE AND MITIGATION FOR DETERMINISTIC TRANSPORT ACROSS MULTIPLE DETERMINISTIC DATA LINKS [patent_app_type] => utility [patent_app_number] => 15/784401 [patent_app_country] => US [patent_app_date] => 2017-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15784401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15231735 [patent_doc_number] => 10503590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Storage array comprising a host-offloaded storage function [patent_app_type] => utility [patent_app_number] => 15/710881 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710881 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12121029 [patent_doc_number] => 20180004616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'FAST WRITE MECHANISM FOR EMULATED ELECTRICALLY ERASEBLE (EEE) SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/704155 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15704155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15012641 [patent_doc_number] => 10452465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Techniques for managing and analyzing log data [patent_app_type] => utility [patent_app_number] => 15/699743 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 18484 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15699743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15399123 [patent_doc_number] => 10540218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Processor system and method for monitoring processors [patent_app_type] => utility [patent_app_number] => 15/689201 [patent_app_country] => US [patent_app_date] => 2017-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4032 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15689201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15231703 [patent_doc_number] => 10503574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-10 [patent_title] => Systems and methods for validating data [patent_app_type] => utility [patent_app_number] => 15/670304 [patent_app_country] => US [patent_app_date] => 2017-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12988 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15670304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13906343 [patent_doc_number] => 20190042376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => COMPUTER ARCHITECTURE FOR MITIGATING TRANSISTOR FAULTS DUE TO RADIATION [patent_app_type] => utility [patent_app_number] => 15/669493 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15137201 [patent_doc_number] => 10482069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-19 [patent_title] => Method and system for implementing a version control adaptive architecture platform [patent_app_type] => utility [patent_app_number] => 15/668934 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15668934 [rel_patent_id] =>[rel_patent_doc_number] =>)