Joseph A Popek

Array ( [id] => 6661068 [patent_doc_number] => 20030135712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Microprocessor having an instruction format contianing timing information' [patent_app_type] => new [patent_app_number] => 10/111591 [patent_app_country] => US [patent_app_date] => 2002-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7042 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20030135712.pdf [firstpage_image] =>[orig_patent_app_number] => 10111591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6844514 [patent_doc_number] => 20030149861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Stalling instructions in a pipelined microprocessor' [patent_app_type] => new [patent_app_number] => 10/100101 [patent_app_country] => US [patent_app_date] => 2002-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3395 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149861.pdf [firstpage_image] =>[orig_patent_app_number] => 10100101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6844513 [patent_doc_number] => 20030149860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Stalling Instructions in a pipelined microprocessor' [patent_app_type] => new [patent_app_number] => 10/007492 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3395 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149860.pdf [firstpage_image] =>[orig_patent_app_number] => 10007492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 995906 [patent_doc_number] => 06918030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Microprocessor for executing speculative load instructions with retry of speculative load instruction without calling any recovery procedures' [patent_app_type] => utility [patent_app_number] => 10/045110 [patent_app_country] => US [patent_app_date] => 2002-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5976 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/918/06918030.pdf [firstpage_image] =>[orig_patent_app_number] => 10045110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6844513 [patent_doc_number] => 20030149860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Stalling Instructions in a pipelined microprocessor' [patent_app_type] => new [patent_app_number] => 10/007492 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3395 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149860.pdf [firstpage_image] =>[orig_patent_app_number] => 10007492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7360580 [patent_doc_number] => 20040014427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Method and apparatus for transferring data between a source register and a destination register' [patent_app_type] => new [patent_app_number] => 09/910554 [patent_app_country] => US [patent_app_date] => 2001-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4615 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20040014427.pdf [firstpage_image] =>[orig_patent_app_number] => 09910554 [rel_patent_id] =>[rel_patent_doc_number] =>)