Search

Cassidy N Stuhlsatz

Examiner (ID: 14450)

Most Active Art Unit
3774
Art Unit(s)
3774
Total Applications
67
Issued Applications
12
Pending Applications
49
Abandoned Applications
6

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9965362 [patent_doc_number] => 09012979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Semiconductor device having an isolation region separating a lateral double diffused metal oxide semiconductor (LDMOS) from a high voltage circuit region' [patent_app_type] => utility [patent_app_number] => 13/832084 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2880 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13832084 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/832084
Semiconductor device having an isolation region separating a lateral double diffused metal oxide semiconductor (LDMOS) from a high voltage circuit region Mar 14, 2013 Issued
Array ( [id] => 9132027 [patent_doc_number] => 20130292740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/802538 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 14525 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13802538 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/802538
Semiconductor device element formed on SOI substrate comprising a hollow region, and having capacitors in an electric field alleviation region Mar 12, 2013 Issued
Array ( [id] => 10882974 [patent_doc_number] => 08907355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Display apparatus having a double sided emission organic light emitting diode comprising a composite anode, and a composite cathode including a non-transparent metal layer' [patent_app_type] => utility [patent_app_number] => 13/824382 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4774 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13824382 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/824382
Display apparatus having a double sided emission organic light emitting diode comprising a composite anode, and a composite cathode including a non-transparent metal layer Mar 11, 2013 Issued
Array ( [id] => 8904303 [patent_doc_number] => 20130171806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/779334 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 17277 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13779334 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/779334
Method of forming a three-dimensional semiconductor memory device comprising sub-cells, terraced structures and strapping regions Feb 26, 2013 Issued
Array ( [id] => 8866125 [patent_doc_number] => 20130149828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'GaN-based Semiconductor Element and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 13/750592 [patent_app_country] => US [patent_app_date] => 2013-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4716 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13750592 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/750592
GaN-based Semiconductor Element and Method of Manufacturing the Same Jan 24, 2013 Abandoned
Array ( [id] => 8841584 [patent_doc_number] => 20130137212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'METHOD OF MANUFACTURING AN ORGANIC THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/723004 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4113 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13723004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/723004
METHOD OF MANUFACTURING AN ORGANIC THIN FILM TRANSISTOR Dec 19, 2012 Abandoned
Array ( [id] => 9316440 [patent_doc_number] => 20140048778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'Display Apparatus' [patent_app_type] => utility [patent_app_number] => 13/721500 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4297 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13721500 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/721500
Organic light emitting display comprising a battery and a flexible printed circuit board Dec 19, 2012 Issued
Array ( [id] => 9171643 [patent_doc_number] => 20130313628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SONOS STRUCTURE, MANUFACTURING METHOD THEREOF AND SEMICONDUCTOR WITH THE SAME STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/721078 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3734 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13721078 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/721078
Method and structure to improve the erasing speed operation of SONOS memory device having a graded silicon nitride layer Dec 19, 2012 Issued
Array ( [id] => 8888566 [patent_doc_number] => 20130161750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'N-Channel Laterally Diffused Metal-Oxide-Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 13/721770 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2161 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13721770 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/721770
N-Channel Laterally Diffused Metal-Oxide-Semiconductor Device Dec 19, 2012 Abandoned
Array ( [id] => 9557912 [patent_doc_number] => 20140175624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'METHOD FOR MANUFACTURING A CHIP ARRANGEMENT, AND CHIP ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 13/721337 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15229 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13721337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/721337
Method of manufacturing a chip arrangement comprising disposing a metal structure over a carrier Dec 19, 2012 Issued
Array ( [id] => 8888534 [patent_doc_number] => 20130161718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'INTEGRATED CIRCUIT DIE AND METHOD OF MAKING' [patent_app_type] => utility [patent_app_number] => 13/532558 [patent_app_country] => US [patent_app_date] => 2012-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13532558 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/532558
INTEGRATED CIRCUIT DIE AND METHOD OF MAKING Jun 24, 2012 Abandoned
Array ( [id] => 10870234 [patent_doc_number] => 08895430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Method of making a semiconductor device comprising a land grid array flip chip bump system with short bumps' [patent_app_type] => utility [patent_app_number] => 13/434660 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 6437 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13434660 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/434660
Method of making a semiconductor device comprising a land grid array flip chip bump system with short bumps Mar 28, 2012 Issued
Array ( [id] => 8657038 [patent_doc_number] => 20130037867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/403302 [patent_app_country] => US [patent_app_date] => 2012-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3690 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13403302 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/403302
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Feb 22, 2012 Abandoned
Array ( [id] => 8356558 [patent_doc_number] => 20120211721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/402058 [patent_app_country] => US [patent_app_date] => 2012-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13402058 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/402058
Semiconductor storage device comprising a memory cell array including a rectifying element and a variable resistor Feb 21, 2012 Issued
Array ( [id] => 9832414 [patent_doc_number] => 08941233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-27 [patent_title] => 'Integrated circuit package with inter-die thermal spreader layers' [patent_app_type] => utility [patent_app_number] => 13/402632 [patent_app_country] => US [patent_app_date] => 2012-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5259 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13402632 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/402632
Integrated circuit package with inter-die thermal spreader layers Feb 21, 2012 Issued
Array ( [id] => 8825930 [patent_doc_number] => 20130126975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'THIN FILM TRANSISTOR ARRAY AND CIRCUIT STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/401816 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2234 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401816 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/401816
THIN FILM TRANSISTOR ARRAY AND CIRCUIT STRUCTURE THEREOF Feb 20, 2012 Abandoned
Array ( [id] => 8808247 [patent_doc_number] => 08445900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Organic eletroluminescent element including polyester electronic material and display device including the same' [patent_app_type] => utility [patent_app_number] => 13/401477 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 18510 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401477 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/401477
Organic eletroluminescent element including polyester electronic material and display device including the same Feb 20, 2012 Issued
Array ( [id] => 8987054 [patent_doc_number] => 20130214335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'Replacement Gate Approach for High-K Metal Gate Stacks by Using a Multi-Layer Contact Level' [patent_app_type] => utility [patent_app_number] => 13/400981 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13400981 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/400981
Replacement gate approach for high-k metal gate stacks by using a multi-layer contact level Feb 20, 2012 Issued
Array ( [id] => 8680864 [patent_doc_number] => 20130049148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'CONDUCTIVE PASTE COMPOSITION AND SEMICONDUCTOR DEVICES MADE THEREWITH' [patent_app_type] => utility [patent_app_number] => 13/401191 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 14954 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401191 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/401191
CONDUCTIVE PASTE COMPOSITION AND SEMICONDUCTOR DEVICES MADE THEREWITH Feb 20, 2012 Abandoned
Array ( [id] => 8986994 [patent_doc_number] => 20130214275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'TRANSISTOR HAVING A NARROW IN-SUBSTRATE COLLECTOR REGION FOR REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE AND A METHOD OF FORMING THE TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/401064 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8355 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401064 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/401064
Transistor having a monocrystalline center section and a polycrystalline outer section, and narrow in-substrate collector region for reduced base-collector junction capacitance Feb 20, 2012 Issued
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