Search

Philip R Coe

Examiner (ID: 14901)

Most Active Art Unit
2402
Art Unit(s)
3401, 2402, 1746, 3405, 2899, 1743, 2412
Total Applications
2878
Issued Applications
2626
Pending Applications
69
Abandoned Applications
183

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3966484 [patent_doc_number] => 05999724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Business process simulation system' [patent_app_type] => 1 [patent_app_number] => 9/257499 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5000 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999724.pdf [firstpage_image] =>[orig_patent_app_number] => 257499 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257499
Business process simulation system Feb 24, 1999 Issued
Array ( [id] => 4098364 [patent_doc_number] => 06018624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Method to back annotate programmable logic device design files based on timing information of a target technology' [patent_app_type] => 1 [patent_app_number] => 9/232333 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6347 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018624.pdf [firstpage_image] =>[orig_patent_app_number] => 232333 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/232333
Method to back annotate programmable logic device design files based on timing information of a target technology Jan 14, 1999 Issued
Array ( [id] => 4224332 [patent_doc_number] => 06117181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Synchronization mechanism for distributed hardware simulation' [patent_app_type] => 1 [patent_app_number] => 9/221670 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 8192 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/117/06117181.pdf [firstpage_image] =>[orig_patent_app_number] => 221670 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221670
Synchronization mechanism for distributed hardware simulation Dec 22, 1998 Issued
Array ( [id] => 3966471 [patent_doc_number] => 05999723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'State-based cache for antivirus software' [patent_app_type] => 1 [patent_app_number] => 9/203828 [patent_app_country] => US [patent_app_date] => 1998-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3900 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999723.pdf [firstpage_image] =>[orig_patent_app_number] => 203828 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/203828
State-based cache for antivirus software Nov 30, 1998 Issued
Array ( [id] => 4111506 [patent_doc_number] => 06049663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Method and facility for uninstalling a computer program package' [patent_app_type] => 1 [patent_app_number] => 9/097723 [patent_app_country] => US [patent_app_date] => 1998-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4080 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049663.pdf [firstpage_image] =>[orig_patent_app_number] => 097723 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/097723
Method and facility for uninstalling a computer program package Jun 15, 1998 Issued
Array ( [id] => 4052544 [patent_doc_number] => 05995729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method and apparatus for aiding configurating management of a computer system' [patent_app_type] => 1 [patent_app_number] => 9/074316 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 11212 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995729.pdf [firstpage_image] =>[orig_patent_app_number] => 074316 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074316
Method and apparatus for aiding configurating management of a computer system May 7, 1998 Issued
Array ( [id] => 4222237 [patent_doc_number] => 06028994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Method for predicting performance of microelectronic device based on electrical parameter test data using computer model' [patent_app_type] => 1 [patent_app_number] => 9/073619 [patent_app_country] => US [patent_app_date] => 1998-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4622 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028994.pdf [firstpage_image] =>[orig_patent_app_number] => 073619 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/073619
Method for predicting performance of microelectronic device based on electrical parameter test data using computer model May 5, 1998 Issued
Array ( [id] => 4308416 [patent_doc_number] => 06212492 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Apparatus and method for circuit simulation which accounts for parasitic elements' [patent_app_type] => 1 [patent_app_number] => 9/069813 [patent_app_country] => US [patent_app_date] => 1998-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4127 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212492.pdf [firstpage_image] =>[orig_patent_app_number] => 069813 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/069813
Apparatus and method for circuit simulation which accounts for parasitic elements Apr 28, 1998 Issued
Array ( [id] => 4207734 [patent_doc_number] => 06044213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Process simulation method for calculating a surface oxidant concentration in oxidation process' [patent_app_type] => 1 [patent_app_number] => 9/065900 [patent_app_country] => US [patent_app_date] => 1998-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9891 [patent_no_of_claims] => 87 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044213.pdf [firstpage_image] =>[orig_patent_app_number] => 065900 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/065900
Process simulation method for calculating a surface oxidant concentration in oxidation process Apr 23, 1998 Issued
Array ( [id] => 4137510 [patent_doc_number] => 06063127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Method for adaptive sampling for building accurate computer models' [patent_app_type] => 1 [patent_app_number] => 9/064014 [patent_app_country] => US [patent_app_date] => 1998-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6405 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063127.pdf [firstpage_image] =>[orig_patent_app_number] => 064014 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/064014
Method for adaptive sampling for building accurate computer models Apr 19, 1998 Issued
Array ( [id] => 4111478 [patent_doc_number] => 06049661 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Method of simulating shape of sample after surface reaction processing, apparatus and recording medium' [patent_app_type] => 1 [patent_app_number] => 9/057530 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5183 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049661.pdf [firstpage_image] =>[orig_patent_app_number] => 057530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057530
Method of simulating shape of sample after surface reaction processing, apparatus and recording medium Apr 8, 1998 Issued
Array ( [id] => 4421072 [patent_doc_number] => 06173244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'System and method for testing a switching system in a telecommunication network' [patent_app_type] => 1 [patent_app_number] => 9/057715 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2724 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/173/06173244.pdf [firstpage_image] =>[orig_patent_app_number] => 057715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057715
System and method for testing a switching system in a telecommunication network Apr 8, 1998 Issued
Array ( [id] => 4222250 [patent_doc_number] => 06028995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Method of determining delay in logic cell models' [patent_app_type] => 1 [patent_app_number] => 9/052914 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 6803 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028995.pdf [firstpage_image] =>[orig_patent_app_number] => 052914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052914
Method of determining delay in logic cell models Mar 30, 1998 Issued
Array ( [id] => 3928926 [patent_doc_number] => 06002863 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Computer implemented method and system for simulating strategic planning and operations using operations control language' [patent_app_type] => 1 [patent_app_number] => 9/047116 [patent_app_country] => US [patent_app_date] => 1998-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5987 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002863.pdf [firstpage_image] =>[orig_patent_app_number] => 047116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047116
Computer implemented method and system for simulating strategic planning and operations using operations control language Mar 23, 1998 Issued
Array ( [id] => 4147720 [patent_doc_number] => 06035115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Method for performing simulation of a semiconductor integrated circuit using a relative variation model' [patent_app_type] => 1 [patent_app_number] => 9/030420 [patent_app_country] => US [patent_app_date] => 1998-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2495 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/035/06035115.pdf [firstpage_image] =>[orig_patent_app_number] => 030420 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/030420
Method for performing simulation of a semiconductor integrated circuit using a relative variation model Feb 24, 1998 Issued
Array ( [id] => 4224303 [patent_doc_number] => 06117179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'High voltage electrical rule check program' [patent_app_type] => 1 [patent_app_number] => 9/028121 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3431 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/117/06117179.pdf [firstpage_image] =>[orig_patent_app_number] => 028121 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/028121
High voltage electrical rule check program Feb 22, 1998 Issued
Array ( [id] => 4134533 [patent_doc_number] => 06072948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Device for rapid simulation of logic circuits' [patent_app_type] => 1 [patent_app_number] => 9/017318 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 7598 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072948.pdf [firstpage_image] =>[orig_patent_app_number] => 017318 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017318
Device for rapid simulation of logic circuits Feb 1, 1998 Issued
Array ( [id] => 4111463 [patent_doc_number] => 06049660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Simulation method in lithographic process' [patent_app_type] => 1 [patent_app_number] => 8/998003 [patent_app_country] => US [patent_app_date] => 1997-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 5850 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049660.pdf [firstpage_image] =>[orig_patent_app_number] => 998003 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/998003
Simulation method in lithographic process Dec 23, 1997 Issued
Array ( [id] => 4081631 [patent_doc_number] => 06009261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Preprocessing of stored target routines for emulating incompatible instructions on a target processor' [patent_app_type] => 1 [patent_app_number] => 8/991714 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 10367 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009261.pdf [firstpage_image] =>[orig_patent_app_number] => 991714 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991714
Preprocessing of stored target routines for emulating incompatible instructions on a target processor Dec 15, 1997 Issued
Array ( [id] => 4093136 [patent_doc_number] => 06099574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method and apparatus for obtaining structure of semiconductor devices and memory for storing program for obtaining the same' [patent_app_type] => 1 [patent_app_number] => 8/991406 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 30 [patent_no_of_words] => 14193 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/099/06099574.pdf [firstpage_image] =>[orig_patent_app_number] => 991406 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991406
Method and apparatus for obtaining structure of semiconductor devices and memory for storing program for obtaining the same Dec 15, 1997 Issued
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