John D Yasko Jr

Array ( [id] => 3935437 [patent_doc_number] => 05972787 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'CMP process using indicator areas to determine endpoint' [patent_app_type] => 1 [patent_app_number] => 9/135866 [patent_app_country] => US [patent_app_date] => 1998-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2567 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/972/05972787.pdf [firstpage_image] =>[orig_patent_app_number] => 135866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3942186 [patent_doc_number] => 05990004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Method for forming a tungsten plug and a barrier layer in a contact of high aspect ratio' [patent_app_type] => 1 [patent_app_number] => 9/115944 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2103 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990004.pdf [firstpage_image] =>[orig_patent_app_number] => 115944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3931881 [patent_doc_number] => 05980983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Liquid precursors for formation of metal oxides' [patent_app_type] => 1 [patent_app_number] => 9/062591 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11578 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/980/05980983.pdf [firstpage_image] =>[orig_patent_app_number] => 062591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3944470 [patent_doc_number] => 05998283 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Silicon wafer having plasma CVD gettering layer with components/composition changing in depth-wise direction and method of manufacturing the silicon wafer' [patent_app_type] => 1 [patent_app_number] => 8/907884 [patent_app_country] => US [patent_app_date] => 1997-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998283.pdf [firstpage_image] =>[orig_patent_app_number] => 907884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3945693 [patent_doc_number] => 05953633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Method for manufacturing self-aligned titanium salicide using two two-step rapid thermal annealing steps' [patent_app_type] => 1 [patent_app_number] => 8/906554 [patent_app_country] => US [patent_app_date] => 1997-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1953 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953633.pdf [firstpage_image] =>[orig_patent_app_number] => 906554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3935144 [patent_doc_number] => 05972766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Method of manufacturing a bipolar transistor by using only two mask layers' [patent_app_type] => 1 [patent_app_number] => 8/808168 [patent_app_country] => US [patent_app_date] => 1997-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3138 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/972/05972766.pdf [firstpage_image] =>[orig_patent_app_number] => 808168 [rel_patent_id] =>[rel_patent_doc_number] =>)