Search

Trong Q Phan

Examiner (ID: 15831, Phone: (571)272-1794 , Office: P/2825 )

Most Active Art Unit
2818
Art Unit(s)
2827, 2511, 2504, 2824, 2825, 2899, 2818
Total Applications
3077
Issued Applications
2717
Pending Applications
50
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11315155 [patent_doc_number] => 20160351265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'FUNCTIONAL DATA PROGRAMMING AND READING IN A MEMORY' [patent_app_type] => utility [patent_app_number] => 15/233097 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233097
Functional data reading in a non-volatile memory Aug 9, 2016 Issued
Array ( [id] => 11539296 [patent_doc_number] => 09613711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Storage device and method of reading a storage device in which reliability verification operation is selectively omitted' [patent_app_type] => utility [patent_app_number] => 15/193134 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 6925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193134 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/193134
Storage device and method of reading a storage device in which reliability verification operation is selectively omitted Jun 26, 2016 Issued
Array ( [id] => 11681109 [patent_doc_number] => 09679643 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-13 [patent_title] => 'Resistive memory device having a trimmable resistance of at least on of a driver and a sinker is trimmed based on a row location' [patent_app_type] => utility [patent_app_number] => 15/065787 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 9647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065787 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065787
Resistive memory device having a trimmable resistance of at least on of a driver and a sinker is trimmed based on a row location Mar 8, 2016 Issued
Array ( [id] => 10992817 [patent_doc_number] => 20160189763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'MEMORY DEVICE COMMAND DECODING SYSTEM AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME' [patent_app_type] => utility [patent_app_number] => 15/063140 [patent_app_country] => US [patent_app_date] => 2016-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5757 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063140 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/063140
Memory device command receiving and decoding methods Mar 6, 2016 Issued
Array ( [id] => 11417401 [patent_doc_number] => 09564233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Open block source bias adjustment for an incompletely programmed block of a nonvolatile storage device' [patent_app_type] => utility [patent_app_number] => 15/061919 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061919 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061919
Open block source bias adjustment for an incompletely programmed block of a nonvolatile storage device Mar 3, 2016 Issued
Array ( [id] => 10984005 [patent_doc_number] => 20160180949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'MEMORY DEVICE AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/058629 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 13101 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058629
Memory device having three-dimensional arrayed memory elements Mar 1, 2016 Issued
Array ( [id] => 11286241 [patent_doc_number] => 09502098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Method of operating a voltage regulator to reduce contention current' [patent_app_type] => utility [patent_app_number] => 15/014119 [patent_app_country] => US [patent_app_date] => 2016-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15014119 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/014119
Method of operating a voltage regulator to reduce contention current Feb 2, 2016 Issued
Array ( [id] => 11391620 [patent_doc_number] => 09552869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-24 [patent_title] => 'Random access memory with pseudo-differential sensing' [patent_app_type] => utility [patent_app_number] => 15/005663 [patent_app_country] => US [patent_app_date] => 2016-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5693 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15005663 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/005663
Random access memory with pseudo-differential sensing Jan 24, 2016 Issued
Array ( [id] => 11417364 [patent_doc_number] => 09564196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Semiconductor memory device and data writing method using a checkerboard pattern utilizing existing data supply bit addresses' [patent_app_type] => utility [patent_app_number] => 15/003317 [patent_app_country] => US [patent_app_date] => 2016-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3096 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15003317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/003317
Semiconductor memory device and data writing method using a checkerboard pattern utilizing existing data supply bit addresses Jan 20, 2016 Issued
Array ( [id] => 11014058 [patent_doc_number] => 20160211011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'DUAL-PORT SRAM TIMING CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/978581 [patent_app_country] => US [patent_app_date] => 2015-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4419 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14978581 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/978581
Dual-port SRAM timing control circuit which can reduce the operational power consumption of SRAM without affecting the read reliability Dec 21, 2015 Issued
Array ( [id] => 11452984 [patent_doc_number] => 09576633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Method and system for programming magnetic junctions utilizing high frequency magnetic oscillations' [patent_app_type] => utility [patent_app_number] => 14/973591 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 7786 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14973591 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/973591
Method and system for programming magnetic junctions utilizing high frequency magnetic oscillations Dec 16, 2015 Issued
Array ( [id] => 10794872 [patent_doc_number] => 20160141030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/945321 [patent_app_country] => US [patent_app_date] => 2015-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9989 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14945321 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/945321
Semiconductor memory device including rewriting operation for improving the long-term reliability of the resistance variable element Nov 17, 2015 Issued
Array ( [id] => 10696630 [patent_doc_number] => 20160042777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'DATA PATHS USING A FIRST SIGNAL TO CAPTURE DATA AND A SECOND SIGNAL TO OUTPUT DATA AND METHODS FOR PROVIDING DATA' [patent_app_type] => utility [patent_app_number] => 14/918249 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918249 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/918249
Data paths using a first signal to capture data and a second signal to output data and methods for providing data Oct 19, 2015 Issued
Array ( [id] => 11770130 [patent_doc_number] => 09378815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Resistive memory device capable of increasing sensing margin by controlling interface states of cell transistors' [patent_app_type] => utility [patent_app_number] => 14/878629 [patent_app_country] => US [patent_app_date] => 2015-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 7916 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14878629 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/878629
Resistive memory device capable of increasing sensing margin by controlling interface states of cell transistors Oct 7, 2015 Issued
Array ( [id] => 11259170 [patent_doc_number] => 09484072 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-01 [patent_title] => 'MIS transistors configured to be placed in programmed state and erased state' [patent_app_type] => utility [patent_app_number] => 14/875777 [patent_app_country] => US [patent_app_date] => 2015-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 11449 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14875777 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/875777
MIS transistors configured to be placed in programmed state and erased state Oct 5, 2015 Issued
Array ( [id] => 10651003 [patent_doc_number] => 09367255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Storage device including variable resistance memory, flash memory and controller' [patent_app_type] => utility [patent_app_number] => 14/855760 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 10949 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14855760 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/855760
Storage device including variable resistance memory, flash memory and controller Sep 15, 2015 Issued
Array ( [id] => 11510033 [patent_doc_number] => 09601196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Resistive change memory including current limitation circuit' [patent_app_type] => utility [patent_app_number] => 14/854361 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 8395 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854361 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854361
Resistive change memory including current limitation circuit Sep 14, 2015 Issued
Array ( [id] => 11321456 [patent_doc_number] => 09520201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-13 [patent_title] => 'Nonvolatile memory device comprising page buffer and program verification operation method thereof' [patent_app_type] => utility [patent_app_number] => 14/853488 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853488 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853488
Nonvolatile memory device comprising page buffer and program verification operation method thereof Sep 13, 2015 Issued
Array ( [id] => 11063508 [patent_doc_number] => 20160260471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/852177 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5473 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14852177 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/852177
SEMICONDUCTOR MEMORY DEVICE Sep 10, 2015 Abandoned
Array ( [id] => 10659321 [patent_doc_number] => 20160005465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'CONTENT ADDRESSABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/850723 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 20883 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850723 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850723
CONTENT ADDRESSABLE MEMORY Sep 9, 2015 Abandoned
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