Search

Tara Leigh Mayo-pinnock

Examiner (ID: 16603, Phone: (571)272-6992 , Office: P/3671 )

Most Active Art Unit
3625
Art Unit(s)
3506, 3625, 3671, 3673, 3672
Total Applications
214
Issued Applications
201
Pending Applications
0
Abandoned Applications
13

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18925431 [patent_doc_number] => 20240028435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => AUTOMOTIVE ELECTRONIC CONTROL UNIT RELIABILITY AND SAFETY DURING POWER STANDBY MODE [patent_app_type] => utility [patent_app_number] => 18/447902 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447902 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447902
AUTOMOTIVE ELECTRONIC CONTROL UNIT RELIABILITY AND SAFETY DURING POWER STANDBY MODE Aug 9, 2023 Pending
Array ( [id] => 18924521 [patent_doc_number] => 20240027525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => PERFORMING SCAN DATA TRANSFER INSIDE MULTI-DIE PACKAGE WITH SERDES FUNCTIONALITY [patent_app_type] => utility [patent_app_number] => 18/364568 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364568 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364568
PERFORMING SCAN DATA TRANSFER INSIDE MULTI-DIE PACKAGE WITH SERDES FUNCTIONALITY Aug 2, 2023 Pending
Array ( [id] => 18741806 [patent_doc_number] => 20230350787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => VIRTUALIZATION OF COMPLEX NETWORKED EMBEDDED SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/348625 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348625 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/348625
VIRTUALIZATION OF COMPLEX NETWORKED EMBEDDED SYSTEMS Jul 6, 2023 Pending
Array ( [id] => 18741770 [patent_doc_number] => 20230350751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => Performing Partial Redundant Array Of Independent Disks (RAID) Stripe Parity Calculations [patent_app_type] => utility [patent_app_number] => 18/348876 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/348876
Performing Partial Redundant Array Of Independent Disks (RAID) Stripe Parity Calculations Jul 6, 2023 Pending
Array ( [id] => 18925446 [patent_doc_number] => 20240028450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => BIT AND SIGNAL LEVEL MAPPING [patent_app_type] => utility [patent_app_number] => 18/213728 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213728 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213728
Bit and signal level mapping Jun 22, 2023 Issued
Array ( [id] => 18659918 [patent_doc_number] => 20230305925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SOFT ERROR DETECTION AND CORRECTION FOR DATA STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 18/325370 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/325370
SOFT ERROR DETECTION AND CORRECTION FOR DATA STORAGE DEVICES May 29, 2023 Pending
Array ( [id] => 18651637 [patent_doc_number] => 20230297473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/324226 [patent_app_country] => US [patent_app_date] => 2023-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324226 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324226
MEMORY SYSTEM May 25, 2023 Pending
Array ( [id] => 19152533 [patent_doc_number] => 11977444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Methods for error count reporting with scaled error count information, and memory devices employing the same [patent_app_type] => utility [patent_app_number] => 18/200439 [patent_app_country] => US [patent_app_date] => 2023-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18200439 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/200439
Methods for error count reporting with scaled error count information, and memory devices employing the same May 21, 2023 Issued
Array ( [id] => 19427030 [patent_doc_number] => 12086452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Authenticated stateless mount string for a distributed file system [patent_app_type] => utility [patent_app_number] => 18/314374 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6909 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18314374 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/314374
Authenticated stateless mount string for a distributed file system May 8, 2023 Issued
Array ( [id] => 18599986 [patent_doc_number] => 20230274787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => METHOD TO INCREASE THE USABLE WORD WIDTH OF A MEMORY PROVIDING AN ERROR CORRECTION SCHEME [patent_app_type] => utility [patent_app_number] => 18/313669 [patent_app_country] => US [patent_app_date] => 2023-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18313669 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/313669
Method to increase the usable word width of a memory providing an error correction scheme May 7, 2023 Issued
Array ( [id] => 18553915 [patent_doc_number] => 20230251927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => TRACKING HOST-PROVIDED METADATA IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/299532 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299532 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/299532
TRACKING HOST-PROVIDED METADATA IN A MEMORY SUB-SYSTEM Apr 11, 2023 Pending
Array ( [id] => 18486952 [patent_doc_number] => 20230214298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => DATA RECOVERY BASED ON PARITY DATA IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/184395 [patent_app_country] => US [patent_app_date] => 2023-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184395 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184395
Data recovery based on parity data in a memory sub-system Mar 14, 2023 Issued
Array ( [id] => 18486949 [patent_doc_number] => 20230214295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION [patent_app_type] => utility [patent_app_number] => 18/121062 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121062 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121062
ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION Mar 13, 2023 Pending
Array ( [id] => 18471343 [patent_doc_number] => 20230205629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => MEMORY SUB-SYSTEM USING PARTIAL SUPERBLOCKS [patent_app_type] => utility [patent_app_number] => 18/117555 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/117555
Memory sub-system using partial superblocks Mar 5, 2023 Issued
Array ( [id] => 18457380 [patent_doc_number] => 20230198662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, RECEPTION METHOD, INTEGRATED CIRCUIT, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 18/112654 [patent_app_country] => US [patent_app_date] => 2023-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112654
TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, RECEPTION METHOD, INTEGRATED CIRCUIT, AND PROGRAM Feb 21, 2023 Pending
Array ( [id] => 18438370 [patent_doc_number] => 20230185665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR FORCED ERROR CHECK AND SCRUB READOUTS [patent_app_type] => utility [patent_app_number] => 18/167768 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167768 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/167768
APPARATUSES, SYSTEMS, AND METHODS FOR FORCED ERROR CHECK AND SCRUB READOUTS Feb 9, 2023 Pending
Array ( [id] => 18782781 [patent_doc_number] => 11824559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Techniques for employing polar code in connection with NR (new radio) [patent_app_type] => utility [patent_app_number] => 18/094068 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094068 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094068
Techniques for employing polar code in connection with NR (new radio) Jan 5, 2023 Issued
Array ( [id] => 18539472 [patent_doc_number] => 20230244580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => METHOD, DETECTION CIRCUIT AND ELECTRONIC DEVICE FOR DETECTING TIMING SEQUENCE OF SERIALIZER [patent_app_type] => utility [patent_app_number] => 18/089803 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089803 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/089803
METHOD, DETECTION CIRCUIT AND ELECTRONIC DEVICE FOR DETECTING TIMING SEQUENCE OF SERIALIZER Dec 27, 2022 Pending
Array ( [id] => 19426610 [patent_doc_number] => 12086028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Reduction of errors in data retrieved from a memory device to apply an error correction code of a predetermined code rate [patent_app_type] => utility [patent_app_number] => 18/064203 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8880 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064203 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064203
Reduction of errors in data retrieved from a memory device to apply an error correction code of a predetermined code rate Dec 8, 2022 Issued
Array ( [id] => 19092540 [patent_doc_number] => 11953989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Low-latency register error correction [patent_app_type] => utility [patent_app_number] => 17/991537 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10366 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/991537
Low-latency register error correction Nov 20, 2022 Issued
Menu