Search

Long Pham

Examiner (ID: 16756, Phone: (571)272-1714 , Office: P/2814 )

Most Active Art Unit
2814
Art Unit(s)
2899, 2897, 1107, 2814, 1763, 2812, 2822, 2823
Total Applications
3709
Issued Applications
3257
Pending Applications
178
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19704736 [patent_doc_number] => 12198782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Memory device, operation method of memory device, and page buffer included in memory device [patent_app_type] => utility [patent_app_number] => 18/449864 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 21048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449864 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449864
Memory device, operation method of memory device, and page buffer included in memory device Aug 14, 2023 Issued
Array ( [id] => 19552760 [patent_doc_number] => 12136471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => PUF applications in memories [patent_app_type] => utility [patent_app_number] => 18/231611 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231611 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231611
PUF applications in memories Aug 7, 2023 Issued
Array ( [id] => 19175043 [patent_doc_number] => 20240161017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Connectome Ensemble Transfer Learning [patent_app_type] => utility [patent_app_number] => 18/198262 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198262 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198262
Connectome Ensemble Transfer Learning May 15, 2023 Abandoned
Array ( [id] => 19596157 [patent_doc_number] => 12154005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Optical control of atomic quantum bits for phase control of operation [patent_app_type] => utility [patent_app_number] => 18/305954 [patent_app_country] => US [patent_app_date] => 2023-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7666 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18305954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/305954
Optical control of atomic quantum bits for phase control of operation Apr 23, 2023 Issued
Array ( [id] => 18540586 [patent_doc_number] => 20230245696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => SRAM POWER-UP RANDOM NUMBER GENERATOR [patent_app_type] => utility [patent_app_number] => 18/298045 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298045 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298045
SRAM power-up random number generator Apr 9, 2023 Issued
Array ( [id] => 19639497 [patent_doc_number] => 12170110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-line and word-line decoders [patent_app_type] => utility [patent_app_number] => 18/057000 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4821 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18057000 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/057000
Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-line and word-line decoders Nov 17, 2022 Issued
Array ( [id] => 19070843 [patent_doc_number] => 20240105269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => BIT LINE MODULATION TO COMPENSATE FOR CELL SOURCE VARIATION [patent_app_type] => utility [patent_app_number] => 17/954489 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954489 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954489
Bit line modulation to compensate for cell source variation Sep 27, 2022 Issued
Array ( [id] => 19022885 [patent_doc_number] => 20240079056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => MEMORY DEVICE, OPERATING METHOD THEREOF, SYSTEM, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/951794 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951794
Memory device, operating method thereof, system, and storage medium Sep 22, 2022 Issued
Array ( [id] => 19054436 [patent_doc_number] => 20240096405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => YIELD RECOVERY SCHEME FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/950022 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950022 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950022
Yield recovery scheme for memory Sep 20, 2022 Issued
Array ( [id] => 17833920 [patent_doc_number] => 20220271224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => RESISTIVE MEMORY ARCHITECTURES WITH MULTIPLE MEMORY CELLS PER ACCESS DEVICE [patent_app_type] => utility [patent_app_number] => 17/744363 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/744363
RESISTIVE MEMORY ARCHITECTURES WITH MULTIPLE MEMORY CELLS PER ACCESS DEVICE May 12, 2022 Abandoned
Array ( [id] => 18570251 [patent_doc_number] => 20230260588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SYSTEMS AND METHODS FOR SENSE CIRCUIT TESTING BY SENSOR EMULATION IN MEMORY DIE [patent_app_type] => utility [patent_app_number] => 17/670720 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670720
SYSTEMS AND METHODS FOR SENSE CIRCUIT TESTING BY SENSOR EMULATION IN MEMORY DIE Feb 13, 2022 Abandoned
Array ( [id] => 19706966 [patent_doc_number] => 12201029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Spin memory encryption [patent_app_type] => utility [patent_app_number] => 17/579048 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6004 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579048
Spin memory encryption Jan 18, 2022 Issued
Array ( [id] => 17477724 [patent_doc_number] => 20220085228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => Two-Dimensional Material Detector Based on Asymmetrically Integrated Optical Microstrip Antenna [patent_app_type] => utility [patent_app_number] => 17/447731 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447731
Two-Dimensional Material Detector Based on Asymmetrically Integrated Optical Microstrip Antenna Sep 14, 2021 Abandoned
Array ( [id] => 17317127 [patent_doc_number] => 20210406176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => ACCELERATED IN-MEMORY CACHE WITH MEMORY ARRAY SECTIONS HAVING DIFFERENT CONFIGURATIONS [patent_app_type] => utility [patent_app_number] => 17/469090 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469090
ACCELERATED IN-MEMORY CACHE WITH MEMORY ARRAY SECTIONS HAVING DIFFERENT CONFIGURATIONS Sep 7, 2021 Pending
Array ( [id] => 18439717 [patent_doc_number] => 20230187012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => IMPLEMENTING FAULT ISOLATION IN DRAM [patent_app_type] => utility [patent_app_number] => 17/926086 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17926086 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/926086
Implementing fault isolation in dram May 20, 2021 Issued
Array ( [id] => 16617567 [patent_doc_number] => 20210036220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => RESISTIVE MEMORY DEVICE HAVING A TEMPLATE LAYER [patent_app_type] => utility [patent_app_number] => 17/074095 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074095
RESISTIVE MEMORY DEVICE HAVING A TEMPLATE LAYER Oct 18, 2020 Abandoned
Array ( [id] => 16509063 [patent_doc_number] => 20200388319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/881069 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16881069 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/881069
SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE May 21, 2020 Abandoned
14/091771 SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME Nov 26, 2013 Abandoned
14/089849 SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME Nov 25, 2013 Abandoned
Array ( [id] => 9292960 [patent_doc_number] => 20140036594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION' [patent_app_type] => utility [patent_app_number] => 14/052802 [patent_app_country] => US [patent_app_date] => 2013-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6558 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14052802 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/052802
NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION Oct 13, 2013 Abandoned
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