Search

Daniel S. Collins

Examiner (ID: 173, Phone: (313)446-6535 , Office: P/3745 )

Most Active Art Unit
3745
Art Unit(s)
3745
Total Applications
779
Issued Applications
623
Pending Applications
71
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3891772 [patent_doc_number] => 05798967 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Sensing scheme for non-volatile memories' [patent_app_type] => 1 [patent_app_number] => 8/801414 [patent_app_country] => US [patent_app_date] => 1997-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3576 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798967.pdf [firstpage_image] =>[orig_patent_app_number] => 801414 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/801414
Sensing scheme for non-volatile memories Feb 21, 1997 Issued
Array ( [id] => 3756724 [patent_doc_number] => 05717633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Low power consuming memory sense amplifying circuitry' [patent_app_type] => 1 [patent_app_number] => 8/798816 [patent_app_country] => US [patent_app_date] => 1997-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7211 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717633.pdf [firstpage_image] =>[orig_patent_app_number] => 798816 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/798816
Low power consuming memory sense amplifying circuitry Feb 10, 1997 Issued
Array ( [id] => 3867722 [patent_doc_number] => 05706236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/797044 [patent_app_country] => US [patent_app_date] => 1997-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4966 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706236.pdf [firstpage_image] =>[orig_patent_app_number] => 797044 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797044
Semiconductor memory device Feb 9, 1997 Issued
Array ( [id] => 3851858 [patent_doc_number] => 05708604 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Dynamic selection control in a memory' [patent_app_type] => 1 [patent_app_number] => 8/789616 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2987 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708604.pdf [firstpage_image] =>[orig_patent_app_number] => 789616 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/789616
Dynamic selection control in a memory Jan 26, 1997 Issued
Array ( [id] => 3738390 [patent_doc_number] => 05671173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Semiconductor integrated circuit device with oblique metallization lines over memory bit and word lines' [patent_app_type] => 1 [patent_app_number] => 8/789124 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4497 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671173.pdf [firstpage_image] =>[orig_patent_app_number] => 789124 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/789124
Semiconductor integrated circuit device with oblique metallization lines over memory bit and word lines Jan 26, 1997 Issued
Array ( [id] => 3739273 [patent_doc_number] => 05703825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'Semiconductor integrated circuit device having a leakage current reduction means' [patent_app_type] => 1 [patent_app_number] => 8/785417 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2283 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/703/05703825.pdf [firstpage_image] =>[orig_patent_app_number] => 785417 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/785417
Semiconductor integrated circuit device having a leakage current reduction means Jan 22, 1997 Issued
Array ( [id] => 3756579 [patent_doc_number] => 05717625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/784963 [patent_app_country] => US [patent_app_date] => 1997-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 213 [patent_no_of_words] => 12756 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717625.pdf [firstpage_image] =>[orig_patent_app_number] => 784963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/784963
Semiconductor memory device Jan 15, 1997 Issued
Array ( [id] => 3830572 [patent_doc_number] => 05790459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Memory circuit for performing threshold voltage tests on cells of a memory array' [patent_app_type] => 1 [patent_app_number] => 8/781427 [patent_app_country] => US [patent_app_date] => 1997-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 10435 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790459.pdf [firstpage_image] =>[orig_patent_app_number] => 781427 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/781427
Memory circuit for performing threshold voltage tests on cells of a memory array Jan 9, 1997 Issued
Array ( [id] => 3866966 [patent_doc_number] => 05768197 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Redundancy circuit for semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/774318 [patent_app_country] => US [patent_app_date] => 1996-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 4547 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768197.pdf [firstpage_image] =>[orig_patent_app_number] => 774318 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/774318
Redundancy circuit for semiconductor memory device Dec 23, 1996 Issued
Array ( [id] => 3767125 [patent_doc_number] => 05742188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Universal input data sampling circuit and method thereof' [patent_app_type] => 1 [patent_app_number] => 8/763123 [patent_app_country] => US [patent_app_date] => 1996-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2404 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742188.pdf [firstpage_image] =>[orig_patent_app_number] => 763123 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763123
Universal input data sampling circuit and method thereof Dec 9, 1996 Issued
Array ( [id] => 3671750 [patent_doc_number] => 05657290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Sense amplifier for reading logic devices' [patent_app_type] => 1 [patent_app_number] => 8/746179 [patent_app_country] => US [patent_app_date] => 1996-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2698 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657290.pdf [firstpage_image] =>[orig_patent_app_number] => 746179 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/746179
Sense amplifier for reading logic devices Nov 4, 1996 Issued
Array ( [id] => 3703140 [patent_doc_number] => 05650957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Semiconductor memory cell and process for formation thereof' [patent_app_type] => 1 [patent_app_number] => 8/730256 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 2345 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/650/05650957.pdf [firstpage_image] =>[orig_patent_app_number] => 730256 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/730256
Semiconductor memory cell and process for formation thereof Oct 14, 1996 Issued
Array ( [id] => 3836191 [patent_doc_number] => 05732031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Address comparing for non-precharged redundancy address matching with redundancy disable mode' [patent_app_type] => 1 [patent_app_number] => 8/709162 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 11249 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732031.pdf [firstpage_image] =>[orig_patent_app_number] => 709162 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709162
Address comparing for non-precharged redundancy address matching with redundancy disable mode Sep 5, 1996 Issued
Array ( [id] => 3866990 [patent_doc_number] => 05768199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Semiconductor memory device with dual precharge operations' [patent_app_type] => 1 [patent_app_number] => 8/709013 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4331 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768199.pdf [firstpage_image] =>[orig_patent_app_number] => 709013 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709013
Semiconductor memory device with dual precharge operations Sep 5, 1996 Issued
Array ( [id] => 3697266 [patent_doc_number] => 05696723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Defect relief decision circuit with dual-fused clocked inverter' [patent_app_type] => 1 [patent_app_number] => 8/705418 [patent_app_country] => US [patent_app_date] => 1996-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3194 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696723.pdf [firstpage_image] =>[orig_patent_app_number] => 705418 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/705418
Defect relief decision circuit with dual-fused clocked inverter Aug 28, 1996 Issued
Array ( [id] => 3802341 [patent_doc_number] => 05841698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/697511 [patent_app_country] => US [patent_app_date] => 1996-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 43 [patent_no_of_words] => 18821 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841698.pdf [firstpage_image] =>[orig_patent_app_number] => 697511 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/697511
Semiconductor device Aug 25, 1996 Issued
Array ( [id] => 3736386 [patent_doc_number] => 05652719 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/682009 [patent_app_country] => US [patent_app_date] => 1996-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 46 [patent_no_of_words] => 22207 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 422 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652719.pdf [firstpage_image] =>[orig_patent_app_number] => 682009 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/682009
Nonvolatile semiconductor memory device Jul 15, 1996 Issued
Array ( [id] => 3657657 [patent_doc_number] => 05640345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Semiconductor memory device and fabrication process' [patent_app_type] => 1 [patent_app_number] => 8/679319 [patent_app_country] => US [patent_app_date] => 1996-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 8556 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640345.pdf [firstpage_image] =>[orig_patent_app_number] => 679319 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/679319
Semiconductor memory device and fabrication process Jul 11, 1996 Issued
Array ( [id] => 3632863 [patent_doc_number] => 05594684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Polysilicon programming memory cell' [patent_app_type] => 1 [patent_app_number] => 8/665532 [patent_app_country] => US [patent_app_date] => 1996-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 3219 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594684.pdf [firstpage_image] =>[orig_patent_app_number] => 665532 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/665532
Polysilicon programming memory cell Jun 17, 1996 Issued
Array ( [id] => 3731915 [patent_doc_number] => 05682343 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Hierarchical bit line arrangement in a semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/664886 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 43 [patent_no_of_words] => 14570 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682343.pdf [firstpage_image] =>[orig_patent_app_number] => 664886 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/664886
Hierarchical bit line arrangement in a semiconductor memory Jun 16, 1996 Issued
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