Michael P Wilser
Examiner (ID: 17438)
Most Active Art Unit | 2195 |
Art Unit(s) | 2195 |
Total Applications | 4 |
Issued Applications | 4 |
Pending Applications | 0 |
Abandoned Applications | 0 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18833557
[patent_doc_number] => 20230402084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/233349
[patent_app_country] => US
[patent_app_date] => 2023-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 33294
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233349
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/233349 | SEMICONDUCTOR DEVICE | Aug 13, 2023 | Pending |
Array
(
[id] => 18791141
[patent_doc_number] => 20230380128
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-23
[patent_title] => STATIC RANDOM ACCESS MEMORY WITH MAGNETIC TUNNEL JUNCTION CELLS
[patent_app_type] => utility
[patent_app_number] => 18/358573
[patent_app_country] => US
[patent_app_date] => 2023-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9644
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358573
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/358573 | STATIC RANDOM ACCESS MEMORY WITH MAGNETIC TUNNEL JUNCTION CELLS | Jul 24, 2023 | Pending |
Array
(
[id] => 18773998
[patent_doc_number] => 20230368828
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => SHARED DECODER CIRCUIT AND METHOD
[patent_app_type] => utility
[patent_app_number] => 18/354445
[patent_app_country] => US
[patent_app_date] => 2023-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15831
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354445
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/354445 | SHARED DECODER CIRCUIT AND METHOD | Jul 17, 2023 | Pending |
Array
(
[id] => 18731528
[patent_doc_number] => 20230345848
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/218570
[patent_app_country] => US
[patent_app_date] => 2023-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218570
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/218570 | RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FORMING THE SAME | Jul 4, 2023 | Pending |
Array
(
[id] => 18712551
[patent_doc_number] => 20230335184
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => SRAM DEVICES WITH REDUCED COUPLING CAPACITANCE
[patent_app_type] => utility
[patent_app_number] => 18/336816
[patent_app_country] => US
[patent_app_date] => 2023-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6431
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336816
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/336816 | SRAM DEVICES WITH REDUCED COUPLING CAPACITANCE | Jun 15, 2023 | Pending |
Array
(
[id] => 18696088
[patent_doc_number] => 20230326519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-12
[patent_title] => Sram Performance Optimization Via Transistor Width And Threshold Voltage Tuning
[patent_app_type] => utility
[patent_app_number] => 18/336304
[patent_app_country] => US
[patent_app_date] => 2023-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10205
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336304
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/336304 | Sram Performance Optimization Via Transistor Width And Threshold Voltage Tuning | Jun 15, 2023 | Pending |
Array
(
[id] => 18696079
[patent_doc_number] => 20230326510
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-12
[patent_title] => SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/336386
[patent_app_country] => US
[patent_app_date] => 2023-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17933
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336386
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/336386 | SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF | Jun 15, 2023 | Pending |
Array
(
[id] => 18712561
[patent_doc_number] => 20230335194
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => 3D NAND FLASH AND OPERATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/211163
[patent_app_country] => US
[patent_app_date] => 2023-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3103
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18211163
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/211163 | 3D NAND FLASH AND OPERATION METHOD THEREOF | Jun 15, 2023 | Pending |
Array
(
[id] => 18757237
[patent_doc_number] => 20230360695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => Memory Systems and Methods for Improved Power Management
[patent_app_type] => utility
[patent_app_number] => 18/203591
[patent_app_country] => US
[patent_app_date] => 2023-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9121
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203591
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/203591 | Memory Systems and Methods for Improved Power Management | May 29, 2023 | Pending |
Array
(
[id] => 19459954
[patent_doc_number] => 12100456
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-24
[patent_title] => Memory device and erasing and verification method thereof
[patent_app_type] => utility
[patent_app_number] => 18/141207
[patent_app_country] => US
[patent_app_date] => 2023-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4029
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141207
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/141207 | Memory device and erasing and verification method thereof | Apr 27, 2023 | Issued |
Array
(
[id] => 18540587
[patent_doc_number] => 20230245697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-03
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/131511
[patent_app_country] => US
[patent_app_date] => 2023-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15688
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18131511
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/131511 | Semiconductor memory device | Apr 5, 2023 | Issued |
Array
(
[id] => 18500303
[patent_doc_number] => 20230223088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => NON-VOLATILE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/123302
[patent_app_country] => US
[patent_app_date] => 2023-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13722
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123302
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/123302 | Non-volatile memory device | Mar 18, 2023 | Issued |
Array
(
[id] => 18500303
[patent_doc_number] => 20230223088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => NON-VOLATILE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/123302
[patent_app_country] => US
[patent_app_date] => 2023-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13722
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123302
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/123302 | Non-volatile memory device | Mar 18, 2023 | Issued |
Array
(
[id] => 18500303
[patent_doc_number] => 20230223088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => NON-VOLATILE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/123302
[patent_app_country] => US
[patent_app_date] => 2023-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13722
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123302
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/123302 | Non-volatile memory device | Mar 18, 2023 | Issued |
Array
(
[id] => 18500303
[patent_doc_number] => 20230223088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => NON-VOLATILE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/123302
[patent_app_country] => US
[patent_app_date] => 2023-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13722
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123302
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/123302 | Non-volatile memory device | Mar 18, 2023 | Issued |
Array
(
[id] => 18472727
[patent_doc_number] => 20230207015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => MEMORY DEVICE AND PROGRAMMING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/114935
[patent_app_country] => US
[patent_app_date] => 2023-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5256
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18114935
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/114935 | MEMORY DEVICE AND PROGRAMMING METHOD THEREOF | Feb 26, 2023 | Pending |
Array
(
[id] => 18475740
[patent_doc_number] => 20230210028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => INTEGRATED CIRCUIT STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/170947
[patent_app_country] => US
[patent_app_date] => 2023-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5976
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170947
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/170947 | INTEGRATED CIRCUIT STRUCTURE | Feb 16, 2023 | Pending |
Array
(
[id] => 18475553
[patent_doc_number] => 20230209841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => CROSSBAR ARRAY CIRCUIT WITH PARALLEL GROUNDING LINES
[patent_app_type] => utility
[patent_app_number] => 18/170837
[patent_app_country] => US
[patent_app_date] => 2023-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3313
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170837
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/170837 | CROSSBAR ARRAY CIRCUIT WITH PARALLEL GROUNDING LINES | Feb 16, 2023 | Pending |
Array
(
[id] => 19446384
[patent_doc_number] => 12096699
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Magnetoresistive effect element
[patent_app_type] => utility
[patent_app_number] => 18/167325
[patent_app_country] => US
[patent_app_date] => 2023-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 11402
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167325
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/167325 | Magnetoresistive effect element | Feb 9, 2023 | Issued |
Array
(
[id] => 18438184
[patent_doc_number] => 20230185479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => MEMORY SUB-SYSTEM REFRESH
[patent_app_type] => utility
[patent_app_number] => 18/105043
[patent_app_country] => US
[patent_app_date] => 2023-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8643
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18105043
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/105043 | Memory sub-system refresh | Feb 1, 2023 | Issued |