Search

Nancy V Le

Director (ID: 1982, Phone: (571)272-4056 , Office: P/2400 )

Most Active Art Unit
2108
Art Unit(s)
2108, 2853, 2858, 2107, 2861
Total Applications
431
Issued Applications
255
Pending Applications
24
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18812995 [patent_doc_number] => 20230387332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SCATTERING STRUCTURES FOR SINGLE-PHOTON AVALANCHE DIODES [patent_app_type] => utility [patent_app_number] => 18/449356 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449356 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449356
Scattering structures for single-photon avalanche diodes Aug 13, 2023 Issued
Array ( [id] => 18812582 [patent_doc_number] => 20230386919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD COMPRISING FORMATION OF REDISTRIBUTION STRUCTURE AND INTERCONNECTING DIE [patent_app_type] => utility [patent_app_number] => 18/446748 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446748 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446748
SEMICONDUCTOR PACKAGE AND METHOD COMPRISING FORMATION OF REDISTRIBUTION STRUCTURE AND INTERCONNECTING DIE Aug 8, 2023 Pending
Array ( [id] => 18832172 [patent_doc_number] => 20230400699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MULTIFUNCTIONAL COLLIMATOR FOR CONTACT IMAGE SENSORS [patent_app_type] => utility [patent_app_number] => 18/231760 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231760
MULTIFUNCTIONAL COLLIMATOR FOR CONTACT IMAGE SENSORS Aug 7, 2023 Pending
Array ( [id] => 19261076 [patent_doc_number] => 12021143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => P-type strained channel in a fin field effect transistor (FinFET) device [patent_app_type] => utility [patent_app_number] => 18/362210 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 9603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362210
P-type strained channel in a fin field effect transistor (FinFET) device Jul 30, 2023 Issued
Array ( [id] => 18755656 [patent_doc_number] => 20230359097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => Display Device [patent_app_type] => utility [patent_app_number] => 18/216182 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216182 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216182
Display Device Jun 28, 2023 Pending
Array ( [id] => 18729367 [patent_doc_number] => 20230343663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/214969 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18214969 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/214969
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF Jun 26, 2023 Pending
Array ( [id] => 18729369 [patent_doc_number] => 20230343665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/215113 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18215113 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/215113
Manufacturing method of electronic package comprising a wire within an electronic component Jun 26, 2023 Issued
Array ( [id] => 19376631 [patent_doc_number] => 12068211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Electronic package comprising multiple wires inside an electronic component [patent_app_type] => utility [patent_app_number] => 18/215107 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5791 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18215107 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/215107
Electronic package comprising multiple wires inside an electronic component Jun 26, 2023 Issued
Array ( [id] => 18712872 [patent_doc_number] => 20230335505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MANUFACTURING PROCESS STEPS OF A SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/212162 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18212162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/212162
MANUFACTURING PROCESS STEPS OF A SEMICONDUCTOR DEVICE PACKAGE Jun 19, 2023 Pending
Array ( [id] => 19428164 [patent_doc_number] => 12087597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Semiconductor structure comprising various via structures [patent_app_type] => utility [patent_app_number] => 18/331961 [patent_app_country] => US [patent_app_date] => 2023-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/331961
Semiconductor structure comprising various via structures Jun 8, 2023 Issued
Array ( [id] => 18680006 [patent_doc_number] => 20230317664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => INTEGRATED CIRCUIT PACKAGES HAVING ADHESION LAYERS FOR THROUGH VIAS [patent_app_type] => utility [patent_app_number] => 18/330616 [patent_app_country] => US [patent_app_date] => 2023-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18330616 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/330616
Integrated circuit packages having adhesion layers for through vias Jun 6, 2023 Issued
Array ( [id] => 18601871 [patent_doc_number] => 20230276677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => DISPLAY PANEL HAVING AN ARRANGEMENT BY UNIT PIXEL PAIRS [patent_app_type] => utility [patent_app_number] => 18/312937 [patent_app_country] => US [patent_app_date] => 2023-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17663 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 409 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312937 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312937
Display panel having an arrangement by unit pixel pairs May 4, 2023 Issued
Array ( [id] => 18600149 [patent_doc_number] => 20230274950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DIE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/311980 [patent_app_country] => US [patent_app_date] => 2023-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18311980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/311980
Method for forming semiconductor die package with ring structure comprising recessed parts May 3, 2023 Issued
Array ( [id] => 18586097 [patent_doc_number] => 20230268362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => METAL MIRROR BASED MULTISPECTRAL FILTER ARRAY [patent_app_type] => utility [patent_app_number] => 18/310769 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18310769 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/310769
METAL MIRROR BASED MULTISPECTRAL FILTER ARRAY May 1, 2023 Pending
Array ( [id] => 18586165 [patent_doc_number] => 20230268430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING DIFFERENT NITRIDE REGIONS AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/307099 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18307099 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/307099
Semiconductor device including different nitride regions improving characteristics of the semiconductor device Apr 25, 2023 Issued
Array ( [id] => 19029992 [patent_doc_number] => 11929358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Display backplate and method for manufacturing same, display panel and method for manufacturing same, and display device [patent_app_type] => utility [patent_app_number] => 18/137857 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 57 [patent_no_of_words] => 12281 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137857 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/137857
Display backplate and method for manufacturing same, display panel and method for manufacturing same, and display device Apr 20, 2023 Issued
Array ( [id] => 18570530 [patent_doc_number] => 20230260867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => HEAT DISPERSION LAYERS FOR DOUBLE SIDED INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/304563 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18304563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/304563
Heat dispersion layers for double sided interconnect Apr 20, 2023 Issued
Array ( [id] => 18600233 [patent_doc_number] => 20230275034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => Selective EMI Shielding Using Preformed Mask [patent_app_type] => utility [patent_app_number] => 18/303308 [patent_app_country] => US [patent_app_date] => 2023-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303308 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/303308
Selective EMI shielding using preformed mask Apr 18, 2023 Issued
Array ( [id] => 18555317 [patent_doc_number] => 20230253334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => SUBSTRATE LOSS REDUCTION FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/302197 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18302197 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/302197
SUBSTRATE LOSS REDUCTION FOR SEMICONDUCTOR DEVICES Apr 17, 2023 Pending
Array ( [id] => 19199199 [patent_doc_number] => 11996448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Manufacturing method of semiconductor device including field-effect transistor comprising buried oxide (BOX) film and silicon layer [patent_app_type] => utility [patent_app_number] => 18/135426 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 11616 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 496 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135426 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/135426
Manufacturing method of semiconductor device including field-effect transistor comprising buried oxide (BOX) film and silicon layer Apr 16, 2023 Issued
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