Search

Gilbert Bentley Ford Iii

Examiner (ID: 2843)

Most Active Art Unit
2912
Art Unit(s)
2912
Total Applications
567
Issued Applications
544
Pending Applications
17
Abandoned Applications
5

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18788046 [patent_doc_number] => 20230376443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Method and System of Using USB User Interface in Electronic Torque Wrench [patent_app_type] => utility [patent_app_number] => 18/230548 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230548 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230548
Method and System of Using USB User Interface in Electronic Torque Wrench Aug 3, 2023 Pending
Array ( [id] => 18678006 [patent_doc_number] => 20230315653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => NETWORK DEVICE CONFIGURATION BASED ON SLAVE DEVICE TYPE [patent_app_type] => utility [patent_app_number] => 18/331432 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8259 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331432 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/331432
NETWORK DEVICE CONFIGURATION BASED ON SLAVE DEVICE TYPE Jun 7, 2023 Pending
Array ( [id] => 18352565 [patent_doc_number] => 20230140676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => RACK CONTROLLER WITH NATIVE SUPPORT FOR INTELLIGENT PATCHING EQUIPMENT INSTALLED IN MULTIPLE RACKS [patent_app_type] => utility [patent_app_number] => 18/147516 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18147516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/147516
RACK CONTROLLER WITH NATIVE SUPPORT FOR INTELLIGENT PATCHING EQUIPMENT INSTALLED IN MULTIPLE RACKS Dec 27, 2022 Pending
Array ( [id] => 19107324 [patent_doc_number] => 11960429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Many-to-many PCIE switch [patent_app_type] => utility [patent_app_number] => 18/082485 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 12645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082485 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/082485
Many-to-many PCIE switch Dec 14, 2022 Issued
Array ( [id] => 18251952 [patent_doc_number] => 20230078991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => PROCESSING DATA STREAM MODIFICATION TO REDUCE POWER EFFECTS DURING PARALLEL PROCESSING [patent_app_type] => utility [patent_app_number] => 17/982574 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982574 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982574
Processing data stream modification to reduce power effects during parallel processing Nov 7, 2022 Issued
Array ( [id] => 18162537 [patent_doc_number] => 20230029130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => DETERMINATION OF A SEQUENCE OF BUS NODES IN A MULTI-DROP COMMUNICATION BUS [patent_app_type] => utility [patent_app_number] => 17/960502 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960502 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960502
DETERMINATION OF A SEQUENCE OF BUS NODES IN A MULTI-DROP COMMUNICATION BUS Oct 4, 2022 Pending
Array ( [id] => 18147846 [patent_doc_number] => 20230021703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => DATA TRANSMISSION METHOD ACCORDING TO INTER-INTEGRATED CIRCUIT PROTOCOL AND TRANSMISSION APPARATUS [patent_app_type] => utility [patent_app_number] => 17/959541 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959541 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959541
DATA TRANSMISSION METHOD ACCORDING TO INTER-INTEGRATED CIRCUIT PROTOCOL AND TRANSMISSION APPARATUS Oct 3, 2022 Pending
Array ( [id] => 19475574 [patent_doc_number] => 12105664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Image processing apparatus having USB host controller, control method therefor, and storage medium storing control program therefor [patent_app_type] => utility [patent_app_number] => 17/958684 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5724 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958684 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958684
IMAGE PROCESSING APPARATUS HAVING USB HOST CONTROLLER, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM STORING CONTROL PROGRAM THEREFOR Oct 2, 2022 Pending
Array ( [id] => 19275984 [patent_doc_number] => 12026112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Seamlessly integrated microcontroller chip [patent_app_type] => utility [patent_app_number] => 17/943183 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 31190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943183
Seamlessly integrated microcontroller chip Sep 11, 2022 Issued
Array ( [id] => 19275986 [patent_doc_number] => 12026114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Port controller and electronic device [patent_app_type] => utility [patent_app_number] => 17/903525 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5464 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903525 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903525
Port controller and electronic device Sep 5, 2022 Issued
Array ( [id] => 18095689 [patent_doc_number] => 20220414030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => HIGH BANDWIDTH MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/901846 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901846
HIGH BANDWIDTH MEMORY SYSTEM Aug 31, 2022 Pending
Array ( [id] => 17984489 [patent_doc_number] => 20220350526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => FLEXIBLE MEMORY EXTENSION SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/866403 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/866403
FLEXIBLE MEMORY EXTENSION SYSTEMS AND METHODS Jul 14, 2022 Pending
Array ( [id] => 18839013 [patent_doc_number] => 11847085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Method, system, and server for monitoring status of solid state drive [patent_app_type] => utility [patent_app_number] => 17/864568 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2205 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/864568
Method, system, and server for monitoring status of solid state drive Jul 13, 2022 Issued
Array ( [id] => 18139625 [patent_doc_number] => 20230013461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => RESCHEDULING MECHANISM FOR ASYNCHRONOUS DEVICES [patent_app_type] => utility [patent_app_number] => 17/858217 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17858217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/858217
Rescheduling mechanism for asynchronous devices Jul 5, 2022 Issued
Array ( [id] => 18787708 [patent_doc_number] => 20230376058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM [patent_app_type] => utility [patent_app_number] => 17/748770 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/748770
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM May 18, 2022 Pending
Array ( [id] => 18965843 [patent_doc_number] => 11899608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Method and apparatus for providing C-PHY interface via FPGA IO interface [patent_app_type] => utility [patent_app_number] => 17/746563 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9227 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746563
Method and apparatus for providing C-PHY interface via FPGA IO interface May 16, 2022 Issued
Array ( [id] => 17832303 [patent_doc_number] => 20220269607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => MULTI-PROCESSOR, MULTI-DOMAIN, MULTI-PROTOCOL, CACHE COHERENT, SPECULATION AWARE SHARED MEMORY AND INTERCONNECT [patent_app_type] => utility [patent_app_number] => 17/740811 [patent_app_country] => US [patent_app_date] => 2022-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17740811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/740811
MULTI-PROCESSOR, MULTI-DOMAIN, MULTI-PROTOCOL, CACHE COHERENT, SPECULATION AWARE SHARED MEMORY AND INTERCONNECT May 9, 2022 Pending
Array ( [id] => 17931944 [patent_doc_number] => 20220327069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => NETWORK DEVICE CONFIGURATION BASED ON SLAVE DEVICE TYPE [patent_app_type] => utility [patent_app_number] => 17/739749 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739749
Network device configuration based on slave device type May 8, 2022 Issued
Array ( [id] => 17992041 [patent_doc_number] => 20220358078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => INTEGRATED CIRCUIT, DATA PROCESSING DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/737527 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737527
Integrated circuit, data processing device and method May 4, 2022 Issued
Array ( [id] => 17794300 [patent_doc_number] => 20220253392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => EMULATED ENDPOINT CONFIGURATION [patent_app_type] => utility [patent_app_number] => 17/660797 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660797
Emulated endpoint configuration Apr 25, 2022 Issued
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