Search

Kevin Lau

Examiner (ID: 3770, Phone: (571)270-7329 , Office: P/2683 )

Most Active Art Unit
2683
Art Unit(s)
2683, 2612
Total Applications
370
Issued Applications
197
Pending Applications
2
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1471592 [patent_doc_number] => 06407428 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Field effect transistor with a buried and confined metal plate to control short channel effects' [patent_app_type] => B1 [patent_app_number] => 09/881978 [patent_app_country] => US [patent_app_date] => 2001-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3069 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407428.pdf [firstpage_image] =>[orig_patent_app_number] => 09881978 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/881978
Field effect transistor with a buried and confined metal plate to control short channel effects Jun 14, 2001 Issued
Array ( [id] => 6137854 [patent_doc_number] => 20020000610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Method for manufacturing a device separation film in a semiconductor device' [patent_app_type] => new [patent_app_number] => 09/880358 [patent_app_country] => US [patent_app_date] => 2001-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2467 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20020000610.pdf [firstpage_image] =>[orig_patent_app_number] => 09880358 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/880358
Method and manufacturing a device separation film in a semiconductor device Jun 12, 2001 Issued
Array ( [id] => 1524924 [patent_doc_number] => 06353265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/877038 [patent_app_country] => US [patent_app_date] => 2001-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 12380 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353265.pdf [firstpage_image] =>[orig_patent_app_number] => 09877038 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877038
Semiconductor device Jun 10, 2001 Issued
Array ( [id] => 6881651 [patent_doc_number] => 20010048123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-06 [patent_title] => 'Semiconductor digital loudspeaker array' [patent_app_type] => new [patent_app_number] => 09/862069 [patent_app_country] => US [patent_app_date] => 2001-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20010048123.pdf [firstpage_image] =>[orig_patent_app_number] => 09862069 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/862069
Semiconductor digital loudspeaker array May 20, 2001 Issued
Array ( [id] => 1524907 [patent_doc_number] => 06353260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-03-05 [patent_title] => 'Effective diffusion barrier' [patent_app_type] => B2 [patent_app_number] => 09/785106 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1912 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353260.pdf [firstpage_image] =>[orig_patent_app_number] => 09785106 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785106
Effective diffusion barrier Feb 19, 2001 Issued
Array ( [id] => 6205323 [patent_doc_number] => 20020070398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE USING DOUBLE LAYERED CAPPING\nPATTERN AND SEMICONDUCTOR MEMORY DEVICE FORMED THEREBY' [patent_app_type] => new [patent_app_number] => 09/777756 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7013 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070398.pdf [firstpage_image] =>[orig_patent_app_number] => 09777756 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777756
Semiconductor memory device using double layered capping pattern and semiconductor memory device formed thereby Feb 4, 2001 Issued
Array ( [id] => 6877223 [patent_doc_number] => 20010002709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-07 [patent_title] => 'Process to produce ultrathin crystalline silicon nitride on Si (111 ) for advanced gate dielectrics' [patent_app_type] => new-utility [patent_app_number] => 09/747966 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1956 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002709.pdf [firstpage_image] =>[orig_patent_app_number] => 09747966 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/747966
Process to produce ultrathin crystalline silicon nitride on Si (111) for advanced gate dielectrics Dec 26, 2000 Issued
Array ( [id] => 1563052 [patent_doc_number] => 06362500 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Memory structure in ferroelectric nonvolatile memory and readout method therefor' [patent_app_type] => B1 [patent_app_number] => 09/749960 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 8425 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362500.pdf [firstpage_image] =>[orig_patent_app_number] => 09749960 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/749960
Memory structure in ferroelectric nonvolatile memory and readout method therefor Dec 26, 2000 Issued
Array ( [id] => 1547448 [patent_doc_number] => 06445038 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Silicon on insulator high-voltage switch' [patent_app_type] => B1 [patent_app_number] => 09/600004 [patent_app_country] => US [patent_app_date] => 2000-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1694 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445038.pdf [firstpage_image] =>[orig_patent_app_number] => 09600004 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/600004
Silicon on insulator high-voltage switch Sep 26, 2000 Issued
Array ( [id] => 1581263 [patent_doc_number] => 06423643 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Process of making carrier substrate and semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/670258 [patent_app_country] => US [patent_app_date] => 2000-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 4845 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423643.pdf [firstpage_image] =>[orig_patent_app_number] => 09670258 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/670258
Process of making carrier substrate and semiconductor device Sep 25, 2000 Issued
Array ( [id] => 1459473 [patent_doc_number] => 06391750 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method of selectively controlling contact resistance by controlling impurity concentration and silicide thickness' [patent_app_type] => B1 [patent_app_number] => 09/639799 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4381 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/391/06391750.pdf [firstpage_image] =>[orig_patent_app_number] => 09639799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639799
Method of selectively controlling contact resistance by controlling impurity concentration and silicide thickness Aug 16, 2000 Issued
Array ( [id] => 1459824 [patent_doc_number] => 06426520 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/636111 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426520.pdf [firstpage_image] =>[orig_patent_app_number] => 09636111 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/636111
Semiconductor device Aug 9, 2000 Issued
Array ( [id] => 1547511 [patent_doc_number] => 06445054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/636353 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2500 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445054.pdf [firstpage_image] =>[orig_patent_app_number] => 09636353 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/636353
Semiconductor device Aug 9, 2000 Issued
Array ( [id] => 1580138 [patent_doc_number] => 06448581 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Mitigation of deleterious effects of micropipes in silicon carbide devices' [patent_app_type] => B1 [patent_app_number] => 09/634021 [patent_app_country] => US [patent_app_date] => 2000-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 630 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448581.pdf [firstpage_image] =>[orig_patent_app_number] => 09634021 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634021
Mitigation of deleterious effects of micropipes in silicon carbide devices Aug 7, 2000 Issued
Array ( [id] => 1580955 [patent_doc_number] => 06423566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Moisture and ion barrier for protection of devices and interconnect structures' [patent_app_type] => B1 [patent_app_number] => 09/629264 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4004 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423566.pdf [firstpage_image] =>[orig_patent_app_number] => 09629264 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/629264
Moisture and ion barrier for protection of devices and interconnect structures Jul 30, 2000 Issued
Array ( [id] => 1497234 [patent_doc_number] => 06404070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/627976 [patent_app_country] => US [patent_app_date] => 2000-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3865 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404070.pdf [firstpage_image] =>[orig_patent_app_number] => 09627976 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627976
Semiconductor device Jul 27, 2000 Issued
Array ( [id] => 7639791 [patent_doc_number] => 06396125 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/624555 [patent_app_country] => US [patent_app_date] => 2000-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2821 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396125.pdf [firstpage_image] =>[orig_patent_app_number] => 09624555 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/624555
Semiconductor device Jul 23, 2000 Issued
Array ( [id] => 1524937 [patent_doc_number] => 06353269 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Method for making cost-effective embedded DRAM structures compatible with logic circuit processing' [patent_app_type] => B1 [patent_app_number] => 09/617024 [patent_app_country] => US [patent_app_date] => 2000-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3912 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353269.pdf [firstpage_image] =>[orig_patent_app_number] => 09617024 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/617024
Method for making cost-effective embedded DRAM structures compatible with logic circuit processing Jul 13, 2000 Issued
Array ( [id] => 7643992 [patent_doc_number] => 06429046 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Flip chip device and method of manufacture' [patent_app_type] => B1 [patent_app_number] => 09/615865 [patent_app_country] => US [patent_app_date] => 2000-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1297 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429046.pdf [firstpage_image] =>[orig_patent_app_number] => 09615865 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/615865
Flip chip device and method of manufacture Jul 12, 2000 Issued
Array ( [id] => 4341506 [patent_doc_number] => 06333562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Multichip module having stacked chip arrangement' [patent_app_type] => 1 [patent_app_number] => 9/615836 [patent_app_country] => US [patent_app_date] => 2000-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3500 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333562.pdf [firstpage_image] =>[orig_patent_app_number] => 615836 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/615836
Multichip module having stacked chip arrangement Jul 12, 2000 Issued
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