Search

Simon King

Examiner (ID: 5105, Phone: (571)270-1950 , Office: P/2653 )

Most Active Art Unit
2653
Art Unit(s)
2614, 2694, 2653
Total Applications
1147
Issued Applications
964
Pending Applications
77
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4309644 [patent_doc_number] => 06188113 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'High voltage transistor with high gated diode breakdown, low body effect and low leakage' [patent_app_type] => 1 [patent_app_number] => 9/502347 [patent_app_country] => US [patent_app_date] => 2000-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3479 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/188/06188113.pdf [firstpage_image] =>[orig_patent_app_number] => 502347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/502347
High voltage transistor with high gated diode breakdown, low body effect and low leakage Feb 9, 2000 Issued
Array ( [id] => 4405874 [patent_doc_number] => 06171916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Semiconductor device having buried gate electrode with silicide layer and manufacture method thereof' [patent_app_type] => 1 [patent_app_number] => 9/427097 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 26 [patent_no_of_words] => 5245 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171916.pdf [firstpage_image] =>[orig_patent_app_number] => 427097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/427097
Semiconductor device having buried gate electrode with silicide layer and manufacture method thereof Oct 25, 1999 Issued
Array ( [id] => 4172280 [patent_doc_number] => 06083782 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'High performance GaAs field effect transistor structure' [patent_app_type] => 1 [patent_app_number] => 9/422827 [patent_app_country] => US [patent_app_date] => 1999-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1020 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083782.pdf [firstpage_image] =>[orig_patent_app_number] => 422827 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/422827
High performance GaAs field effect transistor structure Oct 20, 1999 Issued
Array ( [id] => 4405768 [patent_doc_number] => 06171906 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Method of forming sharp beak of poly to improve erase speed in split gate flash' [patent_app_type] => 1 [patent_app_number] => 9/379227 [patent_app_country] => US [patent_app_date] => 1999-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 3908 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/171/06171906.pdf [firstpage_image] =>[orig_patent_app_number] => 379227 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/379227
Method of forming sharp beak of poly to improve erase speed in split gate flash Aug 22, 1999 Issued
Array ( [id] => 4235229 [patent_doc_number] => 06143592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'MOS semiconductor device and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/365017 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 3872 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143592.pdf [firstpage_image] =>[orig_patent_app_number] => 365017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/365017
MOS semiconductor device and method of fabricating the same Aug 1, 1999 Issued
Array ( [id] => 4154584 [patent_doc_number] => 06103601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method and apparatus for improving film stability of halogen-doped silicon oxide films' [patent_app_type] => 1 [patent_app_number] => 9/330247 [patent_app_country] => US [patent_app_date] => 1999-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9961 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103601.pdf [firstpage_image] =>[orig_patent_app_number] => 330247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/330247
Method and apparatus for improving film stability of halogen-doped silicon oxide films Jun 9, 1999 Issued
Array ( [id] => 4172556 [patent_doc_number] => 06083800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Method for fabricating high voltage semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/283507 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1732 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083800.pdf [firstpage_image] =>[orig_patent_app_number] => 283507 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283507
Method for fabricating high voltage semiconductor device Mar 31, 1999 Issued
Array ( [id] => 4357313 [patent_doc_number] => 06190981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Method for fabricating metal oxide semiconductor' [patent_app_type] => 1 [patent_app_number] => 9/243740 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2542 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/190/06190981.pdf [firstpage_image] =>[orig_patent_app_number] => 243740 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243740
Method for fabricating metal oxide semiconductor Feb 2, 1999 Issued
Array ( [id] => 4152499 [patent_doc_number] => 06124198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Ultra high-speed chip interconnect using free-space dielectrics' [patent_app_type] => 1 [patent_app_number] => 9/187297 [patent_app_country] => US [patent_app_date] => 1998-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8992 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124198.pdf [firstpage_image] =>[orig_patent_app_number] => 187297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187297
Ultra high-speed chip interconnect using free-space dielectrics Nov 4, 1998 Issued
Array ( [id] => 4293271 [patent_doc_number] => 06197617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Semiconductor device with high reliability of connection between projective electrode of semiconductor element and conductive wire of substrate and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/179557 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 5104 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/197/06197617.pdf [firstpage_image] =>[orig_patent_app_number] => 179557 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/179557
Semiconductor device with high reliability of connection between projective electrode of semiconductor element and conductive wire of substrate and method of manufacturing the same Oct 26, 1998 Issued
Array ( [id] => 4156275 [patent_doc_number] => 06156646 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Method of manufacturing semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/159650 [patent_app_country] => US [patent_app_date] => 1998-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 6093 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/156/06156646.pdf [firstpage_image] =>[orig_patent_app_number] => 159650 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159650
Method of manufacturing semiconductor devices Sep 28, 1998 Issued
Array ( [id] => 4153651 [patent_doc_number] => 06107182 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/161920 [patent_app_country] => US [patent_app_date] => 1998-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 10069 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107182.pdf [firstpage_image] =>[orig_patent_app_number] => 161920 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161920
Semiconductor device and method of fabricating the same Sep 28, 1998 Issued
Array ( [id] => 4155594 [patent_doc_number] => 06156597 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Additional buffer layer for eliminating ozone/tetraethylorthosilicate sensitivity on an arbitrary trench structure' [patent_app_type] => 1 [patent_app_number] => 9/094347 [patent_app_country] => US [patent_app_date] => 1998-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 2165 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/156/06156597.pdf [firstpage_image] =>[orig_patent_app_number] => 094347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/094347
Additional buffer layer for eliminating ozone/tetraethylorthosilicate sensitivity on an arbitrary trench structure Jun 8, 1998 Issued
Array ( [id] => 4293928 [patent_doc_number] => 06235862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Adhesive silicone sheet, method for the preparation thereof and semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/070078 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8220 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/235/06235862.pdf [firstpage_image] =>[orig_patent_app_number] => 070078 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070078
Adhesive silicone sheet, method for the preparation thereof and semiconductor devices Apr 29, 1998 Issued
Array ( [id] => 4101320 [patent_doc_number] => 06100119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Thin film transistor and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/057538 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3155 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100119.pdf [firstpage_image] =>[orig_patent_app_number] => 057538 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057538
Thin film transistor and method for fabricating the same Apr 8, 1998 Issued
Array ( [id] => 4419434 [patent_doc_number] => 06177312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method for removing contaminate nitrogen from the peripheral gate region of a non-volatile memory device during production of such device' [patent_app_type] => 1 [patent_app_number] => 9/048459 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2815 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177312.pdf [firstpage_image] =>[orig_patent_app_number] => 048459 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/048459
Method for removing contaminate nitrogen from the peripheral gate region of a non-volatile memory device during production of such device Mar 25, 1998 Issued
Array ( [id] => 4215842 [patent_doc_number] => 06087261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Method for production of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/048177 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 9682 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087261.pdf [firstpage_image] =>[orig_patent_app_number] => 048177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/048177
Method for production of semiconductor device Mar 25, 1998 Issued
Array ( [id] => 4245932 [patent_doc_number] => 06136659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Production process for a capacitor electrode formed of a platinum metal' [patent_app_type] => 1 [patent_app_number] => 9/047850 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2591 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136659.pdf [firstpage_image] =>[orig_patent_app_number] => 047850 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047850
Production process for a capacitor electrode formed of a platinum metal Mar 24, 1998 Issued
Array ( [id] => 4188479 [patent_doc_number] => 06153487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Approach for the formation of semiconductor devices which reduces band-to-band tunneling current and short-channel effects' [patent_app_type] => 1 [patent_app_number] => 9/040107 [patent_app_country] => US [patent_app_date] => 1998-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 1843 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153487.pdf [firstpage_image] =>[orig_patent_app_number] => 040107 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040107
Approach for the formation of semiconductor devices which reduces band-to-band tunneling current and short-channel effects Mar 16, 1998 Issued
Array ( [id] => 4191128 [patent_doc_number] => 06043131 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Method for making a flower shaped DRAM capacitor' [patent_app_type] => 1 [patent_app_number] => 9/041827 [patent_app_country] => US [patent_app_date] => 1998-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1067 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043131.pdf [firstpage_image] =>[orig_patent_app_number] => 041827 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041827
Method for making a flower shaped DRAM capacitor Mar 11, 1998 Issued
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