Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3413889
[patent_doc_number] => 05478415
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-26
[patent_title] => 'Process and composition for sealing anodized aluminum surfaces'
[patent_app_type] => 1
[patent_app_number] => 8/344177
[patent_app_country] => US
[patent_app_date] => 1998-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4353
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/478/05478415.pdf
[firstpage_image] =>[orig_patent_app_number] => 344177
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/344177 | Process and composition for sealing anodized aluminum surfaces | Nov 22, 1998 | Issued |
Array
(
[id] => 3880319
[patent_doc_number] => 05723029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-03
[patent_title] => 'Photo-electric chemical apparatus using carbon cluster electrode'
[patent_app_type] => 1
[patent_app_number] => 8/825396
[patent_app_country] => US
[patent_app_date] => 1997-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1989
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/723/05723029.pdf
[firstpage_image] =>[orig_patent_app_number] => 825396
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/825396 | Photo-electric chemical apparatus using carbon cluster electrode | Mar 27, 1997 | Issued |
Array
(
[id] => 3884619
[patent_doc_number] => 05776818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Method of fabricating silicon-on-insulator pressure detecting device'
[patent_app_type] => 1
[patent_app_number] => 8/803643
[patent_app_country] => US
[patent_app_date] => 1997-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 4221
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/776/05776818.pdf
[firstpage_image] =>[orig_patent_app_number] => 803643
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/803643 | Method of fabricating silicon-on-insulator pressure detecting device | Feb 20, 1997 | Issued |
Array
(
[id] => 3824609
[patent_doc_number] => 05731239
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-24
[patent_title] => 'Method of making self-aligned silicide narrow gate electrodes for field effect transistors having low sheet resistance'
[patent_app_type] => 1
[patent_app_number] => 8/787193
[patent_app_country] => US
[patent_app_date] => 1997-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4124
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/731/05731239.pdf
[firstpage_image] =>[orig_patent_app_number] => 787193
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/787193 | Method of making self-aligned silicide narrow gate electrodes for field effect transistors having low sheet resistance | Jan 21, 1997 | Issued |
Array
(
[id] => 3828267
[patent_doc_number] => 05739064
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Second implanted matrix for agglomeration control and thermal stability'
[patent_app_type] => 1
[patent_app_number] => 8/764685
[patent_app_country] => US
[patent_app_date] => 1996-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2593
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/739/05739064.pdf
[firstpage_image] =>[orig_patent_app_number] => 764685
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/764685 | Second implanted matrix for agglomeration control and thermal stability | Nov 26, 1996 | Issued |
Array
(
[id] => 4168785
[patent_doc_number] => 06140164
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-31
[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/756169
[patent_app_country] => US
[patent_app_date] => 1996-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 3690
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/140/06140164.pdf
[firstpage_image] =>[orig_patent_app_number] => 756169
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/756169 | Method of manufacturing a semiconductor device | Nov 24, 1996 | Issued |
Array
(
[id] => 4027323
[patent_doc_number] => 05855756
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-05
[patent_title] => 'Methods and apparatus for enhancing electrorefining intensity and efficiency'
[patent_app_type] => 1
[patent_app_number] => 8/752757
[patent_app_country] => US
[patent_app_date] => 1996-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 5740
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/855/05855756.pdf
[firstpage_image] =>[orig_patent_app_number] => 752757
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/752757 | Methods and apparatus for enhancing electrorefining intensity and efficiency | Nov 19, 1996 | Issued |
08/748525 | HIGH THROUGHPUT OPTICAL CURING PROCESS FOR SEMICONDUCTOR DEVICE MANUFACTURING | Nov 7, 1996 | Abandoned |
Array
(
[id] => 3791810
[patent_doc_number] => 05726095
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Method for making MOSFET device having controlled parasitic isolation threshold voltage'
[patent_app_type] => 1
[patent_app_number] => 8/743955
[patent_app_country] => US
[patent_app_date] => 1996-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 3400
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/726/05726095.pdf
[firstpage_image] =>[orig_patent_app_number] => 743955
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/743955 | Method for making MOSFET device having controlled parasitic isolation threshold voltage | Oct 27, 1996 | Issued |
Array
(
[id] => 3875211
[patent_doc_number] => 05747367
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-05
[patent_title] => 'Multi-level transistor fabrication method with high performance source/drain connection'
[patent_app_type] => 1
[patent_app_number] => 8/731075
[patent_app_country] => US
[patent_app_date] => 1996-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 3945
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/747/05747367.pdf
[firstpage_image] =>[orig_patent_app_number] => 731075
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/731075 | Multi-level transistor fabrication method with high performance source/drain connection | Oct 8, 1996 | Issued |
Array
(
[id] => 3687789
[patent_doc_number] => 05679239
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'Process and apparatus for generating bromine'
[patent_app_type] => 1
[patent_app_number] => 8/727133
[patent_app_country] => US
[patent_app_date] => 1996-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 5341
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/679/05679239.pdf
[firstpage_image] =>[orig_patent_app_number] => 727133
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/727133 | Process and apparatus for generating bromine | Oct 7, 1996 | Issued |
08/720727 | ASYMMETRICAL P-CHANNEL TRANSISTOR HAVING NITRIDED OXIDE PATTERNED TO SELECTIVELY FORM A SIDEWALL SPACER | Sep 30, 1996 | Abandoned |
Array
(
[id] => 3838512
[patent_doc_number] => 05744371
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-28
[patent_title] => 'Asymmetrical p-channel transistor having a boron migration barrier and LDD implant only in the drain region'
[patent_app_type] => 1
[patent_app_number] => 8/720735
[patent_app_country] => US
[patent_app_date] => 1996-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 33
[patent_no_of_words] => 9146
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/744/05744371.pdf
[firstpage_image] =>[orig_patent_app_number] => 720735
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/720735 | Asymmetrical p-channel transistor having a boron migration barrier and LDD implant only in the drain region | Sep 30, 1996 | Issued |
Array
(
[id] => 3860680
[patent_doc_number] => 05837156
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Methods of fabricating intraocular lenses and lens molds'
[patent_app_type] => 1
[patent_app_number] => 8/727177
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 30
[patent_no_of_words] => 9781
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 26
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/837/05837156.pdf
[firstpage_image] =>[orig_patent_app_number] => 727177
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/727177 | Methods of fabricating intraocular lenses and lens molds | Sep 29, 1996 | Issued |
Array
(
[id] => 3768700
[patent_doc_number] => 05733803
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Method for producing a multiplicity of microelectronic circuits on SOI'
[patent_app_type] => 1
[patent_app_number] => 8/723811
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 2170
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/733/05733803.pdf
[firstpage_image] =>[orig_patent_app_number] => 723811
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/723811 | Method for producing a multiplicity of microelectronic circuits on SOI | Sep 29, 1996 | Issued |
Array
(
[id] => 3728709
[patent_doc_number] => 05698086
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-16
[patent_title] => 'Stepped honed core mandrel'
[patent_app_type] => 1
[patent_app_number] => 8/723323
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2697
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/698/05698086.pdf
[firstpage_image] =>[orig_patent_app_number] => 723323
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/723323 | Stepped honed core mandrel | Sep 29, 1996 | Issued |
Array
(
[id] => 3894550
[patent_doc_number] => 05750428
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Self-aligned non-volatile process with differentially grown gate oxide thickness'
[patent_app_type] => 1
[patent_app_number] => 8/722799
[patent_app_country] => US
[patent_app_date] => 1996-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2760
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/750/05750428.pdf
[firstpage_image] =>[orig_patent_app_number] => 722799
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/722799 | Self-aligned non-volatile process with differentially grown gate oxide thickness | Sep 26, 1996 | Issued |
Array
(
[id] => 3877170
[patent_doc_number] => 05804473
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-08
[patent_title] => 'Thin film semiconductor device having a polycrystal active region and a fabrication process thereof'
[patent_app_type] => 1
[patent_app_number] => 8/717811
[patent_app_country] => US
[patent_app_date] => 1996-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 74
[patent_no_of_words] => 14929
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/804/05804473.pdf
[firstpage_image] =>[orig_patent_app_number] => 717811
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/717811 | Thin film semiconductor device having a polycrystal active region and a fabrication process thereof | Sep 23, 1996 | Issued |
Array
(
[id] => 3838740
[patent_doc_number] => 05744384
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-28
[patent_title] => 'Semiconductor structures which incorporate thin film transistors'
[patent_app_type] => 1
[patent_app_number] => 8/716001
[patent_app_country] => US
[patent_app_date] => 1996-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 5581
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/744/05744384.pdf
[firstpage_image] =>[orig_patent_app_number] => 716001
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/716001 | Semiconductor structures which incorporate thin film transistors | Sep 18, 1996 | Issued |
Array
(
[id] => 3849408
[patent_doc_number] => 05767003
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Thin film semiconductor device manufacturing method'
[patent_app_type] => 1
[patent_app_number] => 8/715169
[patent_app_country] => US
[patent_app_date] => 1996-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3941
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/767/05767003.pdf
[firstpage_image] =>[orig_patent_app_number] => 715169
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/715169 | Thin film semiconductor device manufacturing method | Sep 16, 1996 | Issued |