Search

Carlos R Ortiz Rodriguez

Examiner (ID: 5168, Phone: (571)272-3766 , Office: P/2127 )

Most Active Art Unit
2119
Art Unit(s)
2127, 2122, 2119, 2123, 2125
Total Applications
923
Issued Applications
646
Pending Applications
78
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18821231 [patent_doc_number] => 20230395572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/236325 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236325 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236325
3D semiconductor device and structure with metal layers Aug 20, 2023 Issued
Array ( [id] => 19123589 [patent_doc_number] => 11967583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => 3D semiconductor device and structure with metal layers [patent_app_type] => utility [patent_app_number] => 18/214524 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 66 [patent_no_of_words] => 26011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18214524 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/214524
3D semiconductor device and structure with metal layers Jun 26, 2023 Issued
Array ( [id] => 18913050 [patent_doc_number] => 11876037 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-16 [patent_title] => Chip stacking and packaging structure [patent_app_type] => utility [patent_app_number] => 18/340881 [patent_app_country] => US [patent_app_date] => 2023-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7063 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 473 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340881 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/340881
Chip stacking and packaging structure Jun 24, 2023 Issued
Array ( [id] => 18653133 [patent_doc_number] => 20230298973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/325104 [patent_app_country] => US [patent_app_date] => 2023-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325104 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/325104
PACKAGE AND MANUFACTURING METHOD THEREOF May 28, 2023 Pending
Array ( [id] => 18757672 [patent_doc_number] => 20230361135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SLT Integrated Circuit Capacitor Structure and Methods [patent_app_type] => utility [patent_app_number] => 18/313826 [patent_app_country] => US [patent_app_date] => 2023-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18313826 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/313826
SLT Integrated Circuit Capacitor Structure and Methods May 7, 2023 Pending
Array ( [id] => 18600224 [patent_doc_number] => 20230275025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => Method of Forming an Interconnect Structure Having an Air Gap and Structure Thereof [patent_app_type] => utility [patent_app_number] => 18/313012 [patent_app_country] => US [patent_app_date] => 2023-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18313012 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/313012
Method of Forming an Interconnect Structure Having an Air Gap and Structure Thereof May 4, 2023 Pending
Array ( [id] => 18600198 [patent_doc_number] => 20230274999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 18/312877 [patent_app_country] => US [patent_app_date] => 2023-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8490 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312877 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312877
Semiconductor device and method of manufacture May 4, 2023 Issued
Array ( [id] => 18600237 [patent_doc_number] => 20230275038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SEMICONDUCTOR DIE WITH WARPAGE RELEASE LAYER STRUCTURE IN PACKAGE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/311434 [patent_app_country] => US [patent_app_date] => 2023-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18311434 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/311434
SEMICONDUCTOR DIE WITH WARPAGE RELEASE LAYER STRUCTURE IN PACKAGE AND FABRICATING METHOD THEREOF May 2, 2023 Pending
Array ( [id] => 18586056 [patent_doc_number] => 20230268321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/141415 [patent_app_country] => US [patent_app_date] => 2023-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141415 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141415
3D semiconductor device and structure with metal layers Apr 28, 2023 Issued
Array ( [id] => 18570633 [patent_doc_number] => 20230260970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => DIE TO DIE INTERFACE CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/301817 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301817
DIE TO DIE INTERFACE CIRCUIT Apr 16, 2023 Pending
Array ( [id] => 18540852 [patent_doc_number] => 20230245963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/133463 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133463
SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME Apr 10, 2023 Pending
Array ( [id] => 18540917 [patent_doc_number] => 20230246028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/297293 [patent_app_country] => US [patent_app_date] => 2023-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297293
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME Apr 6, 2023 Pending
Array ( [id] => 18533304 [patent_doc_number] => 20230238380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => SEMICONDUCTOR AND CIRCUIT STRUCTURES, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/190936 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190936 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190936
SEMICONDUCTOR AND CIRCUIT STRUCTURES, AND RELATED METHODS Mar 26, 2023 Pending
Array ( [id] => 18516300 [patent_doc_number] => 20230232622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => SEMICONDUCTOR ASSEMBLIES INCLUDING COMBINATION MEMORY AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/123876 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/123876
SEMICONDUCTOR ASSEMBLIES INCLUDING COMBINATION MEMORY AND METHODS OF MANUFACTURING THE SAME Mar 19, 2023 Pending
Array ( [id] => 18502225 [patent_doc_number] => 20230225100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SRAM Circuits with Aligned Gate Electrodes [patent_app_type] => utility [patent_app_number] => 18/182489 [patent_app_country] => US [patent_app_date] => 2023-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18182489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/182489
SRAM Circuits with Aligned Gate Electrodes Mar 12, 2023 Pending
Array ( [id] => 19123587 [patent_doc_number] => 11967581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Package structures having underfills [patent_app_type] => utility [patent_app_number] => 18/110446 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110446 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110446
Package structures having underfills Feb 15, 2023 Issued
Array ( [id] => 18440087 [patent_doc_number] => 20230187382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/109120 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109120 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/109120
ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF Feb 12, 2023 Pending
Array ( [id] => 18426034 [patent_doc_number] => 20230180499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => ORGANIC LIGHT EMITTING DISPLAY DEVICE AND LIGHTING APPARATUS FOR VEHICLES USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/106911 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/106911
ORGANIC LIGHT EMITTING DISPLAY DEVICE AND LIGHTING APPARATUS FOR VEHICLES USING THE SAME Feb 6, 2023 Pending
Array ( [id] => 18431715 [patent_doc_number] => 11676945 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-06-13 [patent_title] => 3D semiconductor device and structure with metal layers [patent_app_type] => utility [patent_app_number] => 18/105826 [patent_app_country] => US [patent_app_date] => 2023-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 66 [patent_no_of_words] => 25132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18105826 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/105826
3D semiconductor device and structure with metal layers Feb 3, 2023 Issued
Array ( [id] => 18396837 [patent_doc_number] => 20230165058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/094861 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094861 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094861
DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE Jan 8, 2023 Pending
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