Adam C Carlson

Array ( [id] => 18728012 [patent_doc_number] => 20230342305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES [patent_app_type] => utility [patent_app_number] => 18/340944 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18711353 [patent_doc_number] => 20230333982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => HARDWARE COHERENCE FOR MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/337521 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18659951 [patent_doc_number] => 20230305958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => GHOST LIST CACHE EVICTION [patent_app_type] => utility [patent_app_number] => 18/327493 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18327493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18630397 [patent_doc_number] => 20230289290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => Cache Grouping for Increasing Performance and Fairness in Shared Caches [patent_app_type] => utility [patent_app_number] => 18/319016 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19078090 [patent_doc_number] => 11947455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Suppressing cache line modification [patent_app_type] => utility [patent_app_number] => 18/135555 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19152580 [patent_doc_number] => 11977491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Prefetch kill and revival in an instruction cache [patent_app_type] => utility [patent_app_number] => 18/194708 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4915 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18422292 [patent_doc_number] => 20230176756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, INFORMATION PROCESSING PROGRAM, AND MAGNETIC TAPE CARTRIDGE [patent_app_type] => utility [patent_app_number] => 18/165284 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18359548 [patent_doc_number] => 20230141139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => WRITE CACHE CIRCUIT, DATA WRITE METHOD, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/149247 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18238992 [patent_doc_number] => 20230071303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => METHODS AND SYSTEMS FOR MAINTAINING CACHE COHERENCY BETWEEN NODES IN A CLUSTERED ENVIRONMENT BY PERFORMING A BITMAP LOOKUP IN RESPONSE TO A READ REQUEST FROM ONE OF THE NODES [patent_app_type] => utility [patent_app_number] => 18/055174 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055174 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18228300 [patent_doc_number] => 20230067294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => PEAK POWER MANAGEMENT IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/983177 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18989611 [patent_doc_number] => 20240061580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SUBMISSION QUEUE ENTRY AGE TRACKING [patent_app_type] => utility [patent_app_number] => 17/972574 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17972574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18163067 [patent_doc_number] => 20230029660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => DATA CACHE WITH HYBRID WRITEBACK AND WRITETHROUGH [patent_app_type] => utility [patent_app_number] => 17/961137 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7478 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18889502 [patent_doc_number] => 11868272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Methods and apparatus for allocation in a victim cache system [patent_app_type] => utility [patent_app_number] => 17/956960 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 54 [patent_no_of_words] => 95329 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956960 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18125770 [patent_doc_number] => 20230011387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => DATA PROCESSING METHOD AND NVME STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/947812 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18855999 [patent_doc_number] => 11853582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Storage system [patent_app_type] => utility [patent_app_number] => 17/944071 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6920 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18720058 [patent_doc_number] => 11797403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Maintaining a synchronous replication relationship between two or more storage systems [patent_app_type] => utility [patent_app_number] => 17/942974 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 41418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17942974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18095668 [patent_doc_number] => 20220414009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => Data Pattern Based Cache Management [patent_app_type] => utility [patent_app_number] => 17/929544 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18095390 [patent_doc_number] => 20220413731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM [patent_app_type] => utility [patent_app_number] => 17/929303 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18079408 [patent_doc_number] => 20220405020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => METHOD FOR WRITING DATA IN APPEND MODE, DEVICE AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/896811 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18734741 [patent_doc_number] => 11803471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Scalable system on a chip [patent_app_type] => utility [patent_app_number] => 17/821312 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 72 [patent_figures_cnt] => 86 [patent_no_of_words] => 87671 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821312 [rel_patent_id] =>[rel_patent_doc_number] =>)