Search

Patricia T Nguyen

Examiner (ID: 5966, Phone: (571)272-1768 , Office: P/2842 )

Most Active Art Unit
2817
Art Unit(s)
2842, 2817, 2843, 2811
Total Applications
2667
Issued Applications
2455
Pending Applications
114
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2997053 [patent_doc_number] => 05212697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'Variable length character string detection apparatus' [patent_app_type] => 1 [patent_app_number] => 7/859627 [patent_app_country] => US [patent_app_date] => 1992-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4591 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212697.pdf [firstpage_image] =>[orig_patent_app_number] => 859627 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/859627
Variable length character string detection apparatus Mar 19, 1992 Issued
Array ( [id] => 2986142 [patent_doc_number] => 05208816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-04 [patent_title] => 'Generalized viterbi decoding algorithms' [patent_app_type] => 1 [patent_app_number] => 7/850239 [patent_app_country] => US [patent_app_date] => 1992-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8410 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/208/05208816.pdf [firstpage_image] =>[orig_patent_app_number] => 850239 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/850239
Generalized viterbi decoding algorithms Mar 10, 1992 Issued
Array ( [id] => 2997035 [patent_doc_number] => 05212696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'Method and apparatus for producing order independent signatures for error detection' [patent_app_type] => 1 [patent_app_number] => 7/825244 [patent_app_country] => US [patent_app_date] => 1992-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3001 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212696.pdf [firstpage_image] =>[orig_patent_app_number] => 825244 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/825244
Method and apparatus for producing order independent signatures for error detection Feb 27, 1992 Issued
Array ( [id] => 2848415 [patent_doc_number] => 05161157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-03 [patent_title] => 'Field-programmable redundancy apparatus for memory arrays' [patent_app_type] => 1 [patent_app_number] => 7/802005 [patent_app_country] => US [patent_app_date] => 1991-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 16574 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/161/05161157.pdf [firstpage_image] =>[orig_patent_app_number] => 802005 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/802005
Field-programmable redundancy apparatus for memory arrays Nov 26, 1991 Issued
Array ( [id] => 2989029 [patent_doc_number] => 05204820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-20 [patent_title] => 'Method of producing an optically effective arrangement in particular for application with a vehicular headlight' [patent_app_type] => 1 [patent_app_number] => 7/782172 [patent_app_country] => US [patent_app_date] => 1991-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 15882 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/204/05204820.pdf [firstpage_image] =>[orig_patent_app_number] => 782172 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/782172
Method of producing an optically effective arrangement in particular for application with a vehicular headlight Oct 23, 1991 Issued
Array ( [id] => 2813703 [patent_doc_number] => 05146401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Apparatus for providing a universal interface in a process control system' [patent_app_type] => 1 [patent_app_number] => 7/742263 [patent_app_country] => US [patent_app_date] => 1991-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3773 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 490 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146401.pdf [firstpage_image] =>[orig_patent_app_number] => 742263 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/742263
Apparatus for providing a universal interface in a process control system Aug 6, 1991 Issued
Array ( [id] => 2943711 [patent_doc_number] => 05233616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-03 [patent_title] => 'Write-back cache with ECC protection' [patent_app_type] => 1 [patent_app_number] => 7/591199 [patent_app_country] => US [patent_app_date] => 1990-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8263 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/233/05233616.pdf [firstpage_image] =>[orig_patent_app_number] => 591199 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/591199
Write-back cache with ECC protection Sep 30, 1990 Issued
Array ( [id] => 2984304 [patent_doc_number] => 05195094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-16 [patent_title] => 'Optical disk apparatus' [patent_app_type] => 1 [patent_app_number] => 7/586299 [patent_app_country] => US [patent_app_date] => 1990-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3657 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/195/05195094.pdf [firstpage_image] =>[orig_patent_app_number] => 586299 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/586299
Optical disk apparatus Sep 20, 1990 Issued
Array ( [id] => 2919365 [patent_doc_number] => 05216677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-01 [patent_title] => 'Data reproducing apparatus' [patent_app_type] => 1 [patent_app_number] => 7/585409 [patent_app_country] => US [patent_app_date] => 1990-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3800 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/216/05216677.pdf [firstpage_image] =>[orig_patent_app_number] => 585409 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/585409
Data reproducing apparatus Sep 19, 1990 Issued
Array ( [id] => 2997020 [patent_doc_number] => 05251219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'Error detection and correction circuit' [patent_app_type] => 1 [patent_app_number] => 7/579721 [patent_app_country] => US [patent_app_date] => 1990-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2180 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/251/05251219.pdf [firstpage_image] =>[orig_patent_app_number] => 579721 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/579721
Error detection and correction circuit Sep 9, 1990 Issued
Array ( [id] => 2929383 [patent_doc_number] => 05206861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-27 [patent_title] => 'System timing analysis by self-timing logic and clock paths' [patent_app_type] => 1 [patent_app_number] => 7/574639 [patent_app_country] => US [patent_app_date] => 1990-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5434 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/206/05206861.pdf [firstpage_image] =>[orig_patent_app_number] => 574639 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/574639
System timing analysis by self-timing logic and clock paths Aug 27, 1990 Issued
Array ( [id] => 2943630 [patent_doc_number] => 05233611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-03 [patent_title] => 'Automated function testing of application programs' [patent_app_type] => 1 [patent_app_number] => 7/570256 [patent_app_country] => US [patent_app_date] => 1990-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6998 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 530 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/233/05233611.pdf [firstpage_image] =>[orig_patent_app_number] => 570256 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/570256
Automated function testing of application programs Aug 19, 1990 Issued
07/568208 ERROR DETECTION ENCODING SYSTEM Aug 15, 1990 Abandoned
Array ( [id] => 2905294 [patent_doc_number] => 05210860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-11 [patent_title] => 'Intelligent disk array controller' [patent_app_type] => 1 [patent_app_number] => 7/556646 [patent_app_country] => US [patent_app_date] => 1990-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9692 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/210/05210860.pdf [firstpage_image] =>[orig_patent_app_number] => 556646 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/556646
Intelligent disk array controller Jul 19, 1990 Issued
Array ( [id] => 2964782 [patent_doc_number] => 05231640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-27 [patent_title] => 'Fault tolerant processor/memory architecture' [patent_app_type] => 1 [patent_app_number] => 7/557060 [patent_app_country] => US [patent_app_date] => 1990-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3980 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/231/05231640.pdf [firstpage_image] =>[orig_patent_app_number] => 557060 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/557060
Fault tolerant processor/memory architecture Jul 19, 1990 Issued
Array ( [id] => 2983040 [patent_doc_number] => 05182703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Method and apparatus of two-degrees-of-freedom time difference comparison compensator' [patent_app_type] => 1 [patent_app_number] => 7/553377 [patent_app_country] => US [patent_app_date] => 1990-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5394 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182703.pdf [firstpage_image] =>[orig_patent_app_number] => 553377 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/553377
Method and apparatus of two-degrees-of-freedom time difference comparison compensator Jul 16, 1990 Issued
Array ( [id] => 2953459 [patent_doc_number] => 05224103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-29 [patent_title] => 'Processing device and method of programming such a processing device' [patent_app_type] => 1 [patent_app_number] => 7/553039 [patent_app_country] => US [patent_app_date] => 1990-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5738 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/224/05224103.pdf [firstpage_image] =>[orig_patent_app_number] => 553039 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/553039
Processing device and method of programming such a processing device Jul 15, 1990 Issued
07/550822 SEMICONDUCTOR INTEGRATED CIRCUIT Jul 10, 1990 Abandoned
07/550693 SYSTEM FOR DETECTING LOSS OF MESSAGE Jul 9, 1990 Abandoned
Array ( [id] => 2904898 [patent_doc_number] => 05177746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-05 [patent_title] => 'Error correction circuit using a design based on a neural network model' [patent_app_type] => 1 [patent_app_number] => 7/550054 [patent_app_country] => US [patent_app_date] => 1990-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2466 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 522 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/177/05177746.pdf [firstpage_image] =>[orig_patent_app_number] => 550054 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/550054
Error correction circuit using a design based on a neural network model Jul 8, 1990 Issued
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