Raymond J Henley Iii

Array ( [id] => 2817248 [patent_doc_number] => 05146588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Redundancy accumulator for disk drive array memory' [patent_app_type] => 1 [patent_app_number] => 7/617574 [patent_app_country] => US [patent_app_date] => 1990-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5679 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146588.pdf [firstpage_image] =>[orig_patent_app_number] => 617574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2797958 [patent_doc_number] => 05130988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Software verification by fault insertion' [patent_app_type] => 1 [patent_app_number] => 7/583208 [patent_app_country] => US [patent_app_date] => 1990-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3777 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130988.pdf [firstpage_image] =>[orig_patent_app_number] => 583208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2871059 [patent_doc_number] => 05166938 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-24 [patent_title] => 'Error correction circuit using a design based on a neural network model comprising an encoder portion and a decoder portion' [patent_app_type] => 1 [patent_app_number] => 7/549931 [patent_app_country] => US [patent_app_date] => 1990-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 3412 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 590 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/166/05166938.pdf [firstpage_image] =>[orig_patent_app_number] => 549931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2814791 [patent_doc_number] => 05146458 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Data transfer checking system' [patent_app_type] => 1 [patent_app_number] => 7/537329 [patent_app_country] => US [patent_app_date] => 1990-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2627 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146458.pdf [firstpage_image] =>[orig_patent_app_number] => 537329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2819992 [patent_doc_number] => 05157780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'Master-slave checking system' [patent_app_type] => 1 [patent_app_number] => 7/536884 [patent_app_country] => US [patent_app_date] => 1990-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3351 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/157/05157780.pdf [firstpage_image] =>[orig_patent_app_number] => 536884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2816256 [patent_doc_number] => 05148434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-15 [patent_title] => 'Digital data generator' [patent_app_type] => 1 [patent_app_number] => 7/519883 [patent_app_country] => US [patent_app_date] => 1990-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3924 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/148/05148434.pdf [firstpage_image] =>[orig_patent_app_number] => 519883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2858463 [patent_doc_number] => 05107499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-21 [patent_title] => 'Arrangement for automated troubleshooting using selective advice and a learning knowledge base' [patent_app_type] => 1 [patent_app_number] => 7/516411 [patent_app_country] => US [patent_app_date] => 1990-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5300 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/107/05107499.pdf [firstpage_image] =>[orig_patent_app_number] => 516411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2856597 [patent_doc_number] => 05138710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'Apparatus and method for providing recoverability in mass storage data base systems without audit trail mechanisms' [patent_app_type] => 1 [patent_app_number] => 7/514783 [patent_app_country] => US [patent_app_date] => 1990-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 35 [patent_no_of_words] => 11026 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138710.pdf [firstpage_image] =>[orig_patent_app_number] => 514783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2814197 [patent_doc_number] => 05124987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Logical track write scheduling system for a parallel disk drive array data storage subsystem' [patent_app_type] => 1 [patent_app_number] => 7/509484 [patent_app_country] => US [patent_app_date] => 1990-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12279 [patent_no_of_claims] => 80 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/124/05124987.pdf [firstpage_image] =>[orig_patent_app_number] => 509484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2837125 [patent_doc_number] => 05117426 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Circuit, device, and method to detect voltage leakage' [patent_app_type] => 1 [patent_app_number] => 7/499131 [patent_app_country] => US [patent_app_date] => 1990-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4178 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117426.pdf [firstpage_image] =>[orig_patent_app_number] => 499131 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2854811 [patent_doc_number] => 05138616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'Continuous on-line link error rate detector utilizing the frame bit error rate' [patent_app_type] => 1 [patent_app_number] => 7/495553 [patent_app_country] => US [patent_app_date] => 1990-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4548 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138616.pdf [firstpage_image] =>[orig_patent_app_number] => 495553 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2889978 [patent_doc_number] => 05119379 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Method and apparatus for fault reporting' [patent_app_type] => 1 [patent_app_number] => 7/484957 [patent_app_country] => US [patent_app_date] => 1990-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3227 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119379.pdf [firstpage_image] =>[orig_patent_app_number] => 484957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2814828 [patent_doc_number] => 05146460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Logic simulation using a hardware accelerator together with an automated error event isolation and trace facility' [patent_app_type] => 1 [patent_app_number] => 7/481145 [patent_app_country] => US [patent_app_date] => 1990-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5046 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146460.pdf [firstpage_image] =>[orig_patent_app_number] => 481145 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2799587 [patent_doc_number] => 05155844 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Background memory test during system start up' [patent_app_type] => 1 [patent_app_number] => 7/479911 [patent_app_country] => US [patent_app_date] => 1990-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2455 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155844.pdf [firstpage_image] =>[orig_patent_app_number] => 479911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2878260 [patent_doc_number] => 05097470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-17 [patent_title] => 'Diagnostic system for programmable controller with serial data link' [patent_app_type] => 1 [patent_app_number] => 7/479165 [patent_app_country] => US [patent_app_date] => 1990-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7254 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/097/05097470.pdf [firstpage_image] =>[orig_patent_app_number] => 479165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2882213 [patent_doc_number] => 05091908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'Built-in self-test technique for read-only memories' [patent_app_type] => 1 [patent_app_number] => 7/475524 [patent_app_country] => US [patent_app_date] => 1990-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 6908 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091908.pdf [firstpage_image] =>[orig_patent_app_number] => 475524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2795950 [patent_doc_number] => 05142537 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-25 [patent_title] => 'Video signal processing circuit' [patent_app_type] => 1 [patent_app_number] => 7/474541 [patent_app_country] => US [patent_app_date] => 1990-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 23745 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/142/05142537.pdf [firstpage_image] =>[orig_patent_app_number] => 474541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2912315 [patent_doc_number] => 05218605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Software modules for testing computer hardware and software' [patent_app_type] => 1 [patent_app_number] => 7/472694 [patent_app_country] => US [patent_app_date] => 1990-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9885 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/218/05218605.pdf [firstpage_image] =>[orig_patent_app_number] => 472694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2841398 [patent_doc_number] => 05128941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Method of organizing a memory for fault tolerance' [patent_app_type] => 1 [patent_app_number] => 7/453644 [patent_app_country] => US [patent_app_date] => 1989-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4777 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/128/05128941.pdf [firstpage_image] =>[orig_patent_app_number] => 453644 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2848159 [patent_doc_number] => 05121394 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-09 [patent_title] => 'Method of organizing programmable logic array devices for board testability' [patent_app_type] => 1 [patent_app_number] => 7/453645 [patent_app_country] => US [patent_app_date] => 1989-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3013 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/121/05121394.pdf [firstpage_image] =>[orig_patent_app_number] => 453645 [rel_patent_id] =>[rel_patent_doc_number] =>)