Search

David B Springer

Examiner (ID: 6773)

Most Active Art Unit
1201
Art Unit(s)
1202, 2506, 1621, 1201, 1209, 2401, 1613, 1802
Total Applications
2063
Issued Applications
1774
Pending Applications
26
Abandoned Applications
263

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18819646 [patent_doc_number] => 20230393986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => EFFICIENT CACHE EVICTION AND INSERTIONS FOR SUSTAINED STEADY STATE PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/235801 [patent_app_country] => US [patent_app_date] => 2023-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/235801
EFFICIENT CACHE EVICTION AND INSERTIONS FOR SUSTAINED STEADY STATE PERFORMANCE Aug 17, 2023 Pending
Array ( [id] => 18904757 [patent_doc_number] => 20240020242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRITE MERGING [patent_app_type] => utility [patent_app_number] => 18/362015 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 95368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362015 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362015
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRITE MERGING Jul 30, 2023 Pending
Array ( [id] => 18727791 [patent_doc_number] => 20230342084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => GENERATING COMMAND SNAPSHOTS IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/216115 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216115
GENERATING COMMAND SNAPSHOTS IN MEMORY DEVICES Jun 28, 2023 Pending
Array ( [id] => 19426641 [patent_doc_number] => 12086059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Methods for managing storage operations for multiple hosts coupled to dual-port solid-state disks and devices thereof [patent_app_type] => utility [patent_app_number] => 18/121389 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121389 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121389
Methods for managing storage operations for multiple hosts coupled to dual-port solid-state disks and devices thereof Mar 13, 2023 Issued
Array ( [id] => 18471363 [patent_doc_number] => 20230205649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => Hardware-Assisted Memory Disaggregation with Recovery from Network Failures Using Non-Volatile Memory [patent_app_type] => utility [patent_app_number] => 18/175450 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/175450
Hardware-Assisted Memory Disaggregation with Recovery from Network Failures Using Non-Volatile Memory Feb 26, 2023 Pending
Array ( [id] => 18568944 [patent_doc_number] => 20230259280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => METHODS AND SYSTEM OF PREVENTING DUPLICATION OF ENCRYPTED DATA [patent_app_type] => utility [patent_app_number] => 18/171203 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171203 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/171203
METHODS AND SYSTEM OF PREVENTING DUPLICATION OF ENCRYPTED DATA Feb 16, 2023 Pending
Array ( [id] => 18981957 [patent_doc_number] => 11907130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-20 [patent_title] => Determining whether to perform an additional lookup of tracking circuitry [patent_app_type] => utility [patent_app_number] => 18/101602 [patent_app_country] => US [patent_app_date] => 2023-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8547 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18101602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/101602
Determining whether to perform an additional lookup of tracking circuitry Jan 25, 2023 Issued
Array ( [id] => 18393291 [patent_doc_number] => 20230161511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => COMMAND BLOCK MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/100654 [patent_app_country] => US [patent_app_date] => 2023-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18100654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/100654
Command block management Jan 23, 2023 Issued
Array ( [id] => 19355910 [patent_doc_number] => 12056356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Storage device, electronic device including the same, and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/081585 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10995 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081585 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081585
Storage device, electronic device including the same, and operating method thereof Dec 13, 2022 Issued
Array ( [id] => 18306666 [patent_doc_number] => 20230110566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => METHOD FOR SYNCHRONIZATION FOR IMPROVING CONCURRENT READ PERFORMANCE OF CRITICAL SECTION IN DISTRIBUTED SHARED MEMORY AND APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/938654 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/938654
METHOD FOR SYNCHRONIZATION FOR IMPROVING CONCURRENT READ PERFORMANCE OF CRITICAL SECTION IN DISTRIBUTED SHARED MEMORY AND APPARATUS USING THE SAME Oct 5, 2022 Pending
Array ( [id] => 19313356 [patent_doc_number] => 12039170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Hardware revocation engine for temporal memory safety [patent_app_type] => utility [patent_app_number] => 17/934355 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7369 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934355 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934355
Hardware revocation engine for temporal memory safety Sep 21, 2022 Issued
Array ( [id] => 18240245 [patent_doc_number] => 20230072556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => PROCESSING UNIT ARCHITECTURES AND TECHNIQUES FOR REUSABLE INSTRUCTIONS AND DATA [patent_app_type] => utility [patent_app_number] => 17/944014 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944014 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944014
PROCESSING UNIT ARCHITECTURES AND TECHNIQUES FOR REUSABLE INSTRUCTIONS AND DATA Sep 12, 2022 Pending
Array ( [id] => 18148333 [patent_doc_number] => 20230022190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SYSTEMS AND METHODS FOR ADAPTIVE HYBRID HARDWARE PRE-FETCH [patent_app_type] => utility [patent_app_number] => 17/944031 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944031 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944031
SYSTEMS AND METHODS FOR ADAPTIVE HYBRID HARDWARE PRE-FETCH Sep 12, 2022 Pending
Array ( [id] => 19355920 [patent_doc_number] => 12056366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Storage system [patent_app_type] => utility [patent_app_number] => 17/940371 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 19493 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940371
Storage system Sep 7, 2022 Issued
Array ( [id] => 18644702 [patent_doc_number] => 11768770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Cache memory addressing [patent_app_type] => utility [patent_app_number] => 17/823480 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823480
Cache memory addressing Aug 29, 2022 Issued
Array ( [id] => 18254192 [patent_doc_number] => 20230081231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => INTERCONNECT BASED ADDRESS MAPPING FOR IMPROVED RELIABILITY [patent_app_type] => utility [patent_app_number] => 17/893790 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893790 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893790
Interconnect based address mapping for improved reliability Aug 22, 2022 Issued
Array ( [id] => 18989646 [patent_doc_number] => 20240061615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => COMMAND SCHEDULING FOR A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/892960 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892960 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892960
COMMAND SCHEDULING FOR A MEMORY SYSTEM Aug 21, 2022 Pending
Array ( [id] => 18989606 [patent_doc_number] => 20240061575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => OPEN BLOCK MANAGEMENT IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/889179 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889179
Open block management in memory devices Aug 15, 2022 Issued
Array ( [id] => 18651664 [patent_doc_number] => 20230297500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => DATA STORAGE DEVICE FOR DETERMINING A WRITE ADDRESS USING A NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 17/889297 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889297 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889297
Data storage device for determining a write address using a neural network Aug 15, 2022 Issued
Array ( [id] => 18038263 [patent_doc_number] => 20220382479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM [patent_app_type] => utility [patent_app_number] => 17/819319 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17819319 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/819319
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM Aug 11, 2022 Pending
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