Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 2997163
[patent_doc_number] => 05251227
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-05
[patent_title] => 'Targeted resets in a data processor including a trace memory to store transactions'
[patent_app_type] => 1
[patent_app_number] => 7/852509
[patent_app_country] => US
[patent_app_date] => 1992-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
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[pdf_file] => patents/05/251/05251227.pdf
[firstpage_image] =>[orig_patent_app_number] => 852509
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/852509 | Targeted resets in a data processor including a trace memory to store transactions | Mar 16, 1992 | Issued |
07/789443 | TARGETED RESETS IN A DATA PROCESSOR | Nov 6, 1991 | Abandoned |
Array
(
[id] => 2843339
[patent_doc_number] => 05175853
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-29
[patent_title] => 'Transparent system interrupt'
[patent_app_type] => 1
[patent_app_number] => 7/787762
[patent_app_country] => US
[patent_app_date] => 1991-11-06
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/175/05175853.pdf
[firstpage_image] =>[orig_patent_app_number] => 787762
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/787762 | Transparent system interrupt | Nov 5, 1991 | Issued |
Array
(
[id] => 2842712
[patent_doc_number] => 05175820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-29
[patent_title] => 'Apparatus for use with a computing device controlling communications with a plurality of peripheral devices including a feedback bus to indicate operational modes'
[patent_app_type] => 1
[patent_app_number] => 7/800862
[patent_app_country] => US
[patent_app_date] => 1991-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3617
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[pdf_file] => patents/05/175/05175820.pdf
[firstpage_image] =>[orig_patent_app_number] => 800862
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/800862 | Apparatus for use with a computing device controlling communications with a plurality of peripheral devices including a feedback bus to indicate operational modes | Oct 24, 1991 | Issued |
Array
(
[id] => 2799512
[patent_doc_number] => 05155840
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-13
[patent_title] => 'Single-chip mircocomputer with clock-signal switching function which can disable a high-speed oscillator to reduce power consumption'
[patent_app_type] => 1
[patent_app_number] => 7/669192
[patent_app_country] => US
[patent_app_date] => 1991-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3319
[patent_no_of_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/155/05155840.pdf
[firstpage_image] =>[orig_patent_app_number] => 669192
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/669192 | Single-chip mircocomputer with clock-signal switching function which can disable a high-speed oscillator to reduce power consumption | Mar 13, 1991 | Issued |
07/646136 | SYSTEM FOR OPTIONAL MODULE DETECTION | Jan 24, 1991 | Abandoned |
Array
(
[id] => 2795341
[patent_doc_number] => 05165021
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-17
[patent_title] => 'Transmit queue with loadsheding'
[patent_app_type] => 1
[patent_app_number] => 7/643397
[patent_app_country] => US
[patent_app_date] => 1991-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7131
[patent_no_of_claims] => 16
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/165/05165021.pdf
[firstpage_image] =>[orig_patent_app_number] => 643397
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/643397 | Transmit queue with loadsheding | Jan 17, 1991 | Issued |
Array
(
[id] => 2883111
[patent_doc_number] => 05163154
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-10
[patent_title] => 'Microcontroller for the rapid execution of a large number of operations which can be broken down into sequences of operations of the same kind'
[patent_app_type] => 1
[patent_app_number] => 7/631596
[patent_app_country] => US
[patent_app_date] => 1990-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/163/05163154.pdf
[firstpage_image] =>[orig_patent_app_number] => 631596
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/631596 | Microcontroller for the rapid execution of a large number of operations which can be broken down into sequences of operations of the same kind | Dec 20, 1990 | Issued |
Array
(
[id] => 2930083
[patent_doc_number] => 05193171
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-09
[patent_title] => 'Method of managing space of peripheral storages and apparatus for the same'
[patent_app_type] => 1
[patent_app_number] => 7/625046
[patent_app_country] => US
[patent_app_date] => 1990-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4853
[patent_no_of_claims] => 18
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/193/05193171.pdf
[firstpage_image] =>[orig_patent_app_number] => 625046
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/625046 | Method of managing space of peripheral storages and apparatus for the same | Dec 9, 1990 | Issued |
Array
(
[id] => 2843207
[patent_doc_number] => 05175846
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-29
[patent_title] => 'Clock device for serial bus derived from an address bit'
[patent_app_type] => 1
[patent_app_number] => 7/622662
[patent_app_country] => US
[patent_app_date] => 1990-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2388
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/175/05175846.pdf
[firstpage_image] =>[orig_patent_app_number] => 622662
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/622662 | Clock device for serial bus derived from an address bit | Dec 4, 1990 | Issued |
07/618285 | PROCESSOR WITH PRECEDING OPERATION CIRCUIT CONNECTED TO OUTPUT OF DATA REGISTER | Nov 27, 1990 | Abandoned |
Array
(
[id] => 2765424
[patent_doc_number] => 05043877
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-27
[patent_title] => 'Architecture converter for slave elements'
[patent_app_type] => 1
[patent_app_number] => 7/596836
[patent_app_country] => US
[patent_app_date] => 1990-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4164
[patent_no_of_claims] => 34
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[pdf_file] => patents/05/043/05043877.pdf
[firstpage_image] =>[orig_patent_app_number] => 596836
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/596836 | Architecture converter for slave elements | Oct 11, 1990 | Issued |
07/594278 | TRANSPARENT SYSTEM INTERRUPT | Oct 8, 1990 | Abandoned |
Array
(
[id] => 2869224
[patent_doc_number] => 05083258
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-21
[patent_title] => 'Priority control system'
[patent_app_type] => 1
[patent_app_number] => 7/593708
[patent_app_country] => US
[patent_app_date] => 1990-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 1959
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[pdf_file] => patents/05/083/05083258.pdf
[firstpage_image] =>[orig_patent_app_number] => 593708
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/593708 | Priority control system | Oct 4, 1990 | Issued |
Array
(
[id] => 2787826
[patent_doc_number] => 05151992
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-29
[patent_title] => 'Personal computer for cutting off power when a lock mechanism of hard disk pack is released'
[patent_app_type] => 1
[patent_app_number] => 7/591269
[patent_app_country] => US
[patent_app_date] => 1990-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3283
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/151/05151992.pdf
[firstpage_image] =>[orig_patent_app_number] => 591269
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/591269 | Personal computer for cutting off power when a lock mechanism of hard disk pack is released | Sep 30, 1990 | Issued |
07/586349 | DYNAMIC BUS ARBITRATION WITH GRANT SHARING EACH CYCLE | Sep 20, 1990 | Abandoned |
Array
(
[id] => 2787516
[patent_doc_number] => 05151977
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-29
[patent_title] => 'Managing a serial link in an input/output system which indicates link status by continuous sequences of characters between data frames'
[patent_app_type] => 1
[patent_app_number] => 7/575923
[patent_app_country] => US
[patent_app_date] => 1990-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[firstpage_image] =>[orig_patent_app_number] => 575923
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/575923 | Managing a serial link in an input/output system which indicates link status by continuous sequences of characters between data frames | Aug 30, 1990 | Issued |
Array
(
[id] => 2769070
[patent_doc_number] => 05060138
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-22
[patent_title] => 'Apparatus for use with a computing device for generating a substitute acknowledgement to an input when the computing device is in an operational hiatus'
[patent_app_type] => 1
[patent_app_number] => 7/576695
[patent_app_country] => US
[patent_app_date] => 1990-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
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[pdf_file] => patents/05/060/05060138.pdf
[firstpage_image] =>[orig_patent_app_number] => 576695
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/576695 | Apparatus for use with a computing device for generating a substitute acknowledgement to an input when the computing device is in an operational hiatus | Aug 30, 1990 | Issued |
07/576017 | APPARATUS FOR USE WITH A COMPUTING DEVICE CONTROLLING COMMUNICATIONS WITH A PLURALITY OF PERIPHERAL DEVICES | Aug 30, 1990 | Abandoned |
07/557519 | GATEWAY DEVICE FOR CONNECTING A COMPUTER BUS TO A FIBER-OPTIC TOKEN-RING NETWORK | Jul 23, 1990 | Abandoned |