Search

Alain L Bashore

Examiner (ID: 8907)

Most Active Art Unit
1762
Art Unit(s)
1762, 3624, 1792
Total Applications
396
Issued Applications
224
Pending Applications
40
Abandoned Applications
128

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17675079 [patent_doc_number] => 20220188246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => EXCLUSION REGIONS FOR HOST-SIDE MEMORY ADDRESS TRANSLATION [patent_app_type] => utility [patent_app_number] => 17/531581 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17531581 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/531581
Exclusion regions for host-side memory address translation Nov 18, 2021 Issued
Array ( [id] => 18377908 [patent_doc_number] => 20230152995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => BLOCK BUDGET ENHANCEMENT MECHANISMS FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/530056 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530056 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/530056
Block budget enhancement mechanisms for memory Nov 17, 2021 Issued
Array ( [id] => 17853678 [patent_doc_number] => 20220283720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => STORAGE CONTROLLER REDIRECTING WRITE OPERATION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/526243 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17526243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/526243
Storage controller redirecting write operation and operating method thereof Nov 14, 2021 Issued
Array ( [id] => 17430234 [patent_doc_number] => 20220057943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => UNAUTHORIZED ACCESS COMMAND LOGGING FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/453787 [patent_app_country] => US [patent_app_date] => 2021-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453787 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453787
Unauthorized access command logging for memory Nov 4, 2021 Issued
Array ( [id] => 18546934 [patent_doc_number] => 11720286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Extended cross-temperature handling in a memory sub-system [patent_app_type] => utility [patent_app_number] => 17/516009 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17516009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/516009
Extended cross-temperature handling in a memory sub-system Oct 31, 2021 Issued
Array ( [id] => 18462964 [patent_doc_number] => 11687252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Non-volatile memory with pre-trained model and inference circuit [patent_app_type] => utility [patent_app_number] => 17/503612 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 30 [patent_no_of_words] => 19781 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/503612
Non-volatile memory with pre-trained model and inference circuit Oct 17, 2021 Issued
Array ( [id] => 18561424 [patent_doc_number] => 11726667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Memory device with failed main bank repair using redundant bank [patent_app_type] => utility [patent_app_number] => 17/502446 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 11064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/502446
Memory device with failed main bank repair using redundant bank Oct 14, 2021 Issued
Array ( [id] => 17915524 [patent_doc_number] => 20220317920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => CONTROLLER, MEMORY SYSTEM INCLUDING THE SAME, AND METHOD PERFORMED BY THE SAME [patent_app_type] => utility [patent_app_number] => 17/501938 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501938 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501938
Controller for managing cache data, memory system including the same, and method performed by the same Oct 13, 2021 Issued
Array ( [id] => 17794287 [patent_doc_number] => 20220253379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => ON-DIE STATIC RANDOM-ACCESS MEMORY (SRAM) FOR CACHING LOGICAL TO PHYSICAL (L2P) TABLES [patent_app_type] => utility [patent_app_number] => 17/450732 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450732 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450732
On-die static random-access memory (SRAM) for caching logical to physical (L2P) tables Oct 12, 2021 Issued
Array ( [id] => 17832118 [patent_doc_number] => 20220269422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => STORAGE DEVICE AND STORAGE SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/498934 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17498934 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/498934
Storage device and storage system for storing sensor data in an autonomous vehicle Oct 11, 2021 Issued
Array ( [id] => 18294858 [patent_doc_number] => 20230104544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => MANAGING EXTENT SHARING BETWEEN SNAPSHOTS USING MAPPING ADDRESSES [patent_app_type] => utility [patent_app_number] => 17/492950 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492950 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492950
Managing extent sharing between snapshots using mapping addresses Oct 3, 2021 Issued
Array ( [id] => 18506219 [patent_doc_number] => 11704033 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-07-18 [patent_title] => Request routing management for a distributed storage system [patent_app_type] => utility [patent_app_number] => 17/449574 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 26980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17449574 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/449574
Request routing management for a distributed storage system Sep 29, 2021 Issued
Array ( [id] => 17507313 [patent_doc_number] => 20220100416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => PERFORMING SCRAMBLING OPERATIONS BASED ON A PHYSICAL BLOCK ADDRESS OF A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/489405 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489405 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489405
Performing scrambling operations based on a physical block address of a memory sub-system Sep 28, 2021 Issued
Array ( [id] => 18281872 [patent_doc_number] => 20230097344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DYNAMIC REPARTITION OF MEMORY PHYSICAL ADDRESS MAPPING [patent_app_type] => utility [patent_app_number] => 17/487247 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487247 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/487247
Dynamic repartition of memory physical address mapping Sep 27, 2021 Issued
Array ( [id] => 18462970 [patent_doc_number] => 11687258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Operational feature activation/disabling [patent_app_type] => utility [patent_app_number] => 17/447104 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447104
Operational feature activation/disabling Sep 7, 2021 Issued
Array ( [id] => 17899110 [patent_doc_number] => 20220308772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => MEMORY SYSTEM AND DATA MANAGEMENT METHOD [patent_app_type] => utility [patent_app_number] => 17/465501 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465501 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465501
Memory system and data management method including block allocation management Sep 1, 2021 Issued
Array ( [id] => 18228576 [patent_doc_number] => 20230067570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => PROGRAM VOLTAGE STEP BASED ON PROGRAM-SUSPEND TIME [patent_app_type] => utility [patent_app_number] => 17/464853 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464853 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464853
Program voltage step based on program-suspend time Sep 1, 2021 Issued
Array ( [id] => 18291357 [patent_doc_number] => 11620227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Data processing method, network interface card, and server [patent_app_type] => utility [patent_app_number] => 17/464093 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 12085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464093
Data processing method, network interface card, and server Aug 31, 2021 Issued
Array ( [id] => 18519739 [patent_doc_number] => 11709630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Non-volatile memory system, controller for non-volatile memory system, and wear leveling method for non-volatile memory systems [patent_app_type] => utility [patent_app_number] => 17/459956 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459956 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459956
Non-volatile memory system, controller for non-volatile memory system, and wear leveling method for non-volatile memory systems Aug 26, 2021 Issued
Array ( [id] => 18342766 [patent_doc_number] => 11640244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Intelligent block deallocation verification [patent_app_type] => utility [patent_app_number] => 17/401436 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401436
Intelligent block deallocation verification Aug 12, 2021 Issued
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