Bao Thuy L Nguyen
Examiner (ID: 2543)
Most Active Art Unit | 1641 |
Art Unit(s) | 1641, 1677, 1802 |
Total Applications | 986 |
Issued Applications | 447 |
Pending Applications | 220 |
Abandoned Applications | 283 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3699882
[patent_doc_number] => 05680060
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'Method of and circuit arrangement for terminating a line connected to a CMOS integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/574550
[patent_app_country] => US
[patent_app_date] => 1995-12-19
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/680/05680060.pdf
[firstpage_image] =>[orig_patent_app_number] => 574550
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/574550 | Method of and circuit arrangement for terminating a line connected to a CMOS integrated circuit | Dec 18, 1995 | Issued |
Array
(
[id] => 3627114
[patent_doc_number] => 05689198
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'Circuitry and method for gating information'
[patent_app_type] => 1
[patent_app_number] => 8/574085
[patent_app_country] => US
[patent_app_date] => 1995-12-18
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[pdf_file] => patents/05/689/05689198.pdf
[firstpage_image] =>[orig_patent_app_number] => 574085
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/574085 | Circuitry and method for gating information | Dec 17, 1995 | Issued |
Array
(
[id] => 3694205
[patent_doc_number] => 05663662
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-02
[patent_title] => 'Library group and semiconductor integrated circuit structured thereof'
[patent_app_type] => 1
[patent_app_number] => 8/574378
[patent_app_country] => US
[patent_app_date] => 1995-12-18
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Array
(
[id] => 3693704
[patent_doc_number] => 05691654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Voltage level translator circuit'
[patent_app_type] => 1
[patent_app_number] => 8/572618
[patent_app_country] => US
[patent_app_date] => 1995-12-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/691/05691654.pdf
[firstpage_image] =>[orig_patent_app_number] => 572618
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/572618 | Voltage level translator circuit | Dec 13, 1995 | Issued |
Array
(
[id] => 3668163
[patent_doc_number] => 05627797
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-06
[patent_title] => 'Full and empty flag generator for synchronous FIFOS'
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[patent_app_number] => 8/572623
[patent_app_country] => US
[patent_app_date] => 1995-12-14
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[firstpage_image] =>[orig_patent_app_number] => 572623
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/572623 | Full and empty flag generator for synchronous FIFOS | Dec 13, 1995 | Issued |
Array
(
[id] => 3664444
[patent_doc_number] => 05592104
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'Output buffer having transmission gate and isolated supply terminals'
[patent_app_type] => 1
[patent_app_number] => 8/571724
[patent_app_country] => US
[patent_app_date] => 1995-12-13
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[pdf_file] => patents/05/592/05592104.pdf
[firstpage_image] =>[orig_patent_app_number] => 571724
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/571724 | Output buffer having transmission gate and isolated supply terminals | Dec 12, 1995 | Issued |
Array
(
[id] => 3700804
[patent_doc_number] => 05596286
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Current limiting devices to reduce leakage, photo, or stand-by current in an integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/570368
[patent_app_country] => US
[patent_app_date] => 1995-12-11
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[pdf_file] => patents/05/596/05596286.pdf
[firstpage_image] =>[orig_patent_app_number] => 570368
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/570368 | Current limiting devices to reduce leakage, photo, or stand-by current in an integrated circuit | Dec 10, 1995 | Issued |
Array
(
[id] => 3699777
[patent_doc_number] => 05650734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Programming programmable transistor devices using state machines'
[patent_app_type] => 1
[patent_app_number] => 8/570117
[patent_app_country] => US
[patent_app_date] => 1995-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[pdf_file] => patents/05/650/05650734.pdf
[firstpage_image] =>[orig_patent_app_number] => 570117
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/570117 | Programming programmable transistor devices using state machines | Dec 10, 1995 | Issued |
Array
(
[id] => 3627100
[patent_doc_number] => 05689197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'BIMOS-type current switch apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/569691
[patent_app_country] => US
[patent_app_date] => 1995-12-08
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[pdf_file] => patents/05/689/05689197.pdf
[firstpage_image] =>[orig_patent_app_number] => 569691
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/569691 | BIMOS-type current switch apparatus | Dec 7, 1995 | Issued |
Array
(
[id] => 3716024
[patent_doc_number] => 05669684
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Logic level shifter with power on control'
[patent_app_type] => 1
[patent_app_number] => 8/570170
[patent_app_country] => US
[patent_app_date] => 1995-12-07
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[pdf_file] => patents/05/669/05669684.pdf
[firstpage_image] =>[orig_patent_app_number] => 570170
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/570170 | Logic level shifter with power on control | Dec 6, 1995 | Issued |
Array
(
[id] => 3639622
[patent_doc_number] => 05631581
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-20
[patent_title] => 'Microelectronic integrated circuit including triangular semiconductor \"and\" gate device'
[patent_app_type] => 1
[patent_app_number] => 8/567952
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[pdf_file] => patents/05/631/05631581.pdf
[firstpage_image] =>[orig_patent_app_number] => 567952
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567952 | Microelectronic integrated circuit including triangular semiconductor "and" gate device | Dec 5, 1995 | Issued |
Array
(
[id] => 3627086
[patent_doc_number] => 05689196
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'Circuit comprising a data communication bus'
[patent_app_type] => 1
[patent_app_number] => 8/565774
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[pdf_file] => patents/05/689/05689196.pdf
[firstpage_image] =>[orig_patent_app_number] => 565774
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/565774 | Circuit comprising a data communication bus | Nov 30, 1995 | Issued |
Array
(
[id] => 3707594
[patent_doc_number] => 05646556
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Apparatus and method for precharging bus conductors to minimize both drive delay and crosstalk within the bus'
[patent_app_type] => 1
[patent_app_number] => 8/562805
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[pdf_file] => patents/05/646/05646556.pdf
[firstpage_image] =>[orig_patent_app_number] => 562805
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/562805 | Apparatus and method for precharging bus conductors to minimize both drive delay and crosstalk within the bus | Nov 26, 1995 | Issued |
Array
(
[id] => 3512451
[patent_doc_number] => 05570038
[patent_country] => US
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[patent_issue_date] => 1996-10-29
[patent_title] => 'Semiconductor integrated circuit device with data output circuit'
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[pdf_file] => patents/05/570/05570038.pdf
[firstpage_image] =>[orig_patent_app_number] => 561064
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/561064 | Semiconductor integrated circuit device with data output circuit | Nov 21, 1995 | Issued |
Array
(
[id] => 3734290
[patent_doc_number] => 05670898
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Low-power, compact digital logic topology that facilitates large fan-in and high-speed circuit performance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/561914 | Low-power, compact digital logic topology that facilitates large fan-in and high-speed circuit performance | Nov 21, 1995 | Issued |
Array
(
[id] => 3514750
[patent_doc_number] => 05587673
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Clock frequency multiplying and squaring circuit and method'
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[firstpage_image] =>[orig_patent_app_number] => 562228
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/562228 | Clock frequency multiplying and squaring circuit and method | Nov 21, 1995 | Issued |
Array
(
[id] => 3666696
[patent_doc_number] => 05656952
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[patent_kind] => NA
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[patent_title] => 'All-MOS differential high speed output driver for providing positive-ECL levels into a variable load impedance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/558010 | All-MOS differential high speed output driver for providing positive-ECL levels into a variable load impedance | Nov 12, 1995 | Issued |
Array
(
[id] => 3736580
[patent_doc_number] => 05635853
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[patent_issue_date] => 1997-06-03
[patent_title] => 'Inherently balanced voltage regulation and current supply for bus termination'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/556723 | Inherently balanced voltage regulation and current supply for bus termination | Nov 12, 1995 | Issued |
Array
(
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[firstpage_image] =>[orig_patent_app_number] => 550165
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/550165 | Method and apparatus for generating an asynchronously clocked signal in a synchronously clocked programmable device | Oct 29, 1995 | Issued |
Array
(
[id] => 3885007
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[patent_issue_date] => 1998-03-17
[patent_title] => 'Termination circuits for reduced swing signal lines and methods for operating same'
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[pdf_file] => patents/05/729/05729152.pdf
[firstpage_image] =>[orig_patent_app_number] => 549610
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/549610 | Termination circuits for reduced swing signal lines and methods for operating same | Oct 26, 1995 | Issued |