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Bradley Etherton

Examiner (ID: 9093)

Most Active Art Unit
1772
Art Unit(s)
1772, 1797, 1771
Total Applications
250
Issued Applications
179
Pending Applications
1
Abandoned Applications
47

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5728558 [patent_doc_number] => 20060059319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Architecture with shared memory' [patent_app_type] => utility [patent_app_number] => 10/507408 [patent_app_country] => US [patent_app_date] => 2003-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5123 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20060059319.pdf [firstpage_image] =>[orig_patent_app_number] => 10507408 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/507408
Architecture with shared memory Apr 3, 2003 Abandoned
Array ( [id] => 7118827 [patent_doc_number] => 20050071574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Architecture with shared memory' [patent_app_type] => utility [patent_app_number] => 10/494808 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071574.pdf [firstpage_image] =>[orig_patent_app_number] => 10494808 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/494808
Architecture with shared memory Nov 5, 2002 Abandoned
Array ( [id] => 918697 [patent_doc_number] => 07328314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Multiprocessor computing device having shared program memory' [patent_app_type] => utility [patent_app_number] => 10/173589 [patent_app_country] => US [patent_app_date] => 2002-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4979 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/328/07328314.pdf [firstpage_image] =>[orig_patent_app_number] => 10173589 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/173589
Multiprocessor computing device having shared program memory Jun 18, 2002 Issued
Array ( [id] => 6871675 [patent_doc_number] => 20030084365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Signal transmitting/receiving system reducing timing skew between clock signal and data' [patent_app_type] => new [patent_app_number] => 10/134574 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5769 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20030084365.pdf [firstpage_image] =>[orig_patent_app_number] => 10134574 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/134574
Signal transmitting/receiving system reducing timing skew between clock signal and data Apr 29, 2002 Abandoned
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