Bradley Etherton

Array ( [id] => 5195212 [patent_doc_number] => 20070083697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Flash memory management' [patent_app_type] => utility [patent_app_number] => 11/245919 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20070083697.pdf [firstpage_image] =>[orig_patent_app_number] => 11245919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5689844 [patent_doc_number] => 20060288159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Method of controlling cache allocation' [patent_app_type] => utility [patent_app_number] => 11/245173 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20060288159.pdf [firstpage_image] =>[orig_patent_app_number] => 11245173 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5195227 [patent_doc_number] => 20070083712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Method, apparatus, and computer program product for implementing polymorphic reconfiguration of a cache size' [patent_app_type] => utility [patent_app_number] => 11/246819 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20070083712.pdf [firstpage_image] =>[orig_patent_app_number] => 11246819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5717134 [patent_doc_number] => 20060080497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Program-controlled unit' [patent_app_type] => utility [patent_app_number] => 11/243316 [patent_app_country] => US [patent_app_date] => 2005-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 12904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20060080497.pdf [firstpage_image] =>[orig_patent_app_number] => 11243316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5173535 [patent_doc_number] => 20070073974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Eviction algorithm for inclusive lower level cache based upon state of higher level cache' [patent_app_type] => utility [patent_app_number] => 11/239616 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6996 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20070073974.pdf [firstpage_image] =>[orig_patent_app_number] => 11239616 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9652132 [patent_doc_number] => 08806166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Memory allocation in a multi-node computer' [patent_app_type] => utility [patent_app_number] => 11/239596 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11723 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11239596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8022469 [patent_doc_number] => 08140750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Monitoring performance of a storage area network' [patent_app_type] => utility [patent_app_number] => 11/239501 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5385 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140750.pdf [firstpage_image] =>[orig_patent_app_number] => 11239501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5173534 [patent_doc_number] => 20070073973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Method and apparatus for managing buffers in a data processing system' [patent_app_type] => utility [patent_app_number] => 11/238562 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4213 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20070073973.pdf [firstpage_image] =>[orig_patent_app_number] => 11238562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 825560 [patent_doc_number] => 07406573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-29 [patent_title] => 'Reconfigurable processor element utilizing both coarse and fine grained reconfigurable elements' [patent_app_type] => utility [patent_app_number] => 11/222417 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6196 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/406/07406573.pdf [firstpage_image] =>[orig_patent_app_number] => 11222417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1078851 [patent_doc_number] => 07617371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-10 [patent_title] => 'Storage controller and method for controlling the same' [patent_app_type] => utility [patent_app_number] => 11/214002 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8701 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 441 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/617/07617371.pdf [firstpage_image] =>[orig_patent_app_number] => 11214002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5058572 [patent_doc_number] => 20070061494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Semiconductor memory system, semiconductor memory chip, and method of masking write data in a semiconductor memory chip' [patent_app_type] => utility [patent_app_number] => 11/214068 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3194 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20070061494.pdf [firstpage_image] =>[orig_patent_app_number] => 11214068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5150533 [patent_doc_number] => 20070050593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Interlaced even and odd address mapping' [patent_app_type] => utility [patent_app_number] => 11/214967 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4816 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050593.pdf [firstpage_image] =>[orig_patent_app_number] => 11214967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9585730 [patent_doc_number] => 08775740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'System and method for high performance, power efficient store buffer forwarding' [patent_app_type] => utility [patent_app_number] => 11/214501 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5422 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11214501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5150527 [patent_doc_number] => 20070050587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Providing security for storage units' [patent_app_type] => utility [patent_app_number] => 11/215190 [patent_app_country] => US [patent_app_date] => 2005-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5415 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050587.pdf [firstpage_image] =>[orig_patent_app_number] => 11215190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 118105 [patent_doc_number] => 07716413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Method of making a multi-bit-cell flash memory' [patent_app_type] => utility [patent_app_number] => 11/198180 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 10634 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/716/07716413.pdf [firstpage_image] =>[orig_patent_app_number] => 11198180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7529932 [patent_doc_number] => 08046538 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-10-25 [patent_title] => 'Method and mechanism for cache compaction and bandwidth reduction' [patent_app_type] => utility [patent_app_number] => 11/197214 [patent_app_country] => US [patent_app_date] => 2005-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10204 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/046/08046538.pdf [firstpage_image] =>[orig_patent_app_number] => 11197214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5052826 [patent_doc_number] => 20070033371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Method and apparatus for establishing a cache footprint for shared processor logical partitions' [patent_app_type] => utility [patent_app_number] => 11/197616 [patent_app_country] => US [patent_app_date] => 2005-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033371.pdf [firstpage_image] =>[orig_patent_app_number] => 11197616 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5795001 [patent_doc_number] => 20060015682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Disk drive having real time performance improvement' [patent_app_type] => utility [patent_app_number] => 11/182710 [patent_app_country] => US [patent_app_date] => 2005-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5106 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20060015682.pdf [firstpage_image] =>[orig_patent_app_number] => 11182710 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5627053 [patent_doc_number] => 20060265558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Information processing method and system' [patent_app_type] => utility [patent_app_number] => 11/172910 [patent_app_country] => US [patent_app_date] => 2005-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 19454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20060265558.pdf [firstpage_image] =>[orig_patent_app_number] => 11172910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5603953 [patent_doc_number] => 20060294300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Atomic cache transactions in a distributed storage system' [patent_app_type] => utility [patent_app_number] => 11/159019 [patent_app_country] => US [patent_app_date] => 2005-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20060294300.pdf [firstpage_image] =>[orig_patent_app_number] => 11159019 [rel_patent_id] =>[rel_patent_doc_number] =>)