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James Lowe

Examiner (ID: 14939)

Most Active Art Unit
1307
Art Unit(s)
1307
Total Applications
1088
Issued Applications
933
Pending Applications
2
Abandoned Applications
153

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5752090 [patent_doc_number] => 20060221239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Method and device for processing video data for display on a display device' [patent_app_type] => utility [patent_app_number] => 10/541856 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3599 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20060221239.pdf [firstpage_image] =>[orig_patent_app_number] => 10541856 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/541856
Method and device for processing video data for display on a display device Dec 17, 2003 Abandoned
Array ( [id] => 7268347 [patent_doc_number] => 20040056865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Data processor having unified memory architecture using register to optimize memory access' [patent_app_type] => new [patent_app_number] => 10/669562 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 20001 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056865.pdf [firstpage_image] =>[orig_patent_app_number] => 10669562 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/669562
Data processor having unified memory architecture using register to optimize memory access Sep 24, 2003 Issued
Array ( [id] => 7201777 [patent_doc_number] => 20050052449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Novel design for a non-blocking cache for texture mapping' [patent_app_type] => utility [patent_app_number] => 10/403838 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12927 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20050052449.pdf [firstpage_image] =>[orig_patent_app_number] => 10403838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/403838
Design for a non-blocking cache for texture mapping Mar 30, 2003 Issued
Array ( [id] => 1064386 [patent_doc_number] => 06850240 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-01 [patent_title] => 'Method and apparatus for scalable image processing' [patent_app_type] => utility [patent_app_number] => 10/402485 [patent_app_country] => US [patent_app_date] => 2003-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3777 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850240.pdf [firstpage_image] =>[orig_patent_app_number] => 10402485 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/402485
Method and apparatus for scalable image processing Mar 27, 2003 Issued
Array ( [id] => 1026155 [patent_doc_number] => 06885384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Method of creating a larger 2-D sample location pattern from a smaller one by means of X, Y address permutation' [patent_app_type] => utility [patent_app_number] => 10/387357 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 13450 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885384.pdf [firstpage_image] =>[orig_patent_app_number] => 10387357 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387357
Method of creating a larger 2-D sample location pattern from a smaller one by means of X, Y address permutation Mar 11, 2003 Issued
Array ( [id] => 1000357 [patent_doc_number] => 06911984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Desktop compositor using copy-on-write semantics' [patent_app_type] => utility [patent_app_number] => 10/388267 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9784 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/911/06911984.pdf [firstpage_image] =>[orig_patent_app_number] => 10388267 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388267
Desktop compositor using copy-on-write semantics Mar 11, 2003 Issued
Array ( [id] => 7378071 [patent_doc_number] => 20040179019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Double-buffering of pixel data using copy-on-write semantics' [patent_app_type] => new [patent_app_number] => 10/388112 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7907 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20040179019.pdf [firstpage_image] =>[orig_patent_app_number] => 10388112 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388112
Double-buffering of pixel data using copy-on-write semantics Mar 11, 2003 Issued
Array ( [id] => 986162 [patent_doc_number] => 06924808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Area pattern processing of pixels' [patent_app_type] => utility [patent_app_number] => 10/387338 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 9603 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924808.pdf [firstpage_image] =>[orig_patent_app_number] => 10387338 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387338
Area pattern processing of pixels Mar 11, 2003 Issued
Array ( [id] => 6820453 [patent_doc_number] => 20030218614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Dynamically adjusting sample density in a graphics system' [patent_app_type] => new [patent_app_number] => 10/383165 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16697 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218614.pdf [firstpage_image] =>[orig_patent_app_number] => 10383165 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383165
Dynamically adjusting sample density in a graphics system Mar 5, 2003 Issued
Array ( [id] => 982977 [patent_doc_number] => 06927775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Parallel box filtering through reuse of existing circular filter' [patent_app_type] => utility [patent_app_number] => 10/377924 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 7893 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927775.pdf [firstpage_image] =>[orig_patent_app_number] => 10377924 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377924
Parallel box filtering through reuse of existing circular filter Mar 2, 2003 Issued
Array ( [id] => 7418760 [patent_doc_number] => 20040160447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Simple method to minimize memory usage and/or power consumption for dispaly controller circuits' [patent_app_type] => new [patent_app_number] => 10/368117 [patent_app_country] => US [patent_app_date] => 2003-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160447.pdf [firstpage_image] =>[orig_patent_app_number] => 10368117 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/368117
Simple method to minimize memory usage and/or power consumption for dispaly controller circuits Feb 17, 2003 Abandoned
Array ( [id] => 997412 [patent_doc_number] => 06914607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Apparatus and method for buffering data' [patent_app_type] => utility [patent_app_number] => 10/361739 [patent_app_country] => US [patent_app_date] => 2003-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 15122 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914607.pdf [firstpage_image] =>[orig_patent_app_number] => 10361739 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/361739
Apparatus and method for buffering data Feb 7, 2003 Issued
Array ( [id] => 6677322 [patent_doc_number] => 20030227462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Graphics texture processing methods, apparatus and computer program products using texture compression, block overlapping and/or texture filtering' [patent_app_type] => new [patent_app_number] => 10/326849 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5793 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227462.pdf [firstpage_image] =>[orig_patent_app_number] => 10326849 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/326849
Graphics texture processing methods, apparatus and computer program products using texture compression, block overlapping and/or texture filtering Dec 19, 2002 Issued
Array ( [id] => 7350597 [patent_doc_number] => 20040012597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Method and apparatus for generation of programmable shader configuration information from state-based control information and program instructions' [patent_app_type] => new [patent_app_number] => 10/318560 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10692 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20040012597.pdf [firstpage_image] =>[orig_patent_app_number] => 10318560 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318560
Method and apparatus for generation of programmable shader configuration information from state-based control information and program instructions Dec 12, 2002 Issued
Array ( [id] => 6859478 [patent_doc_number] => 20030090486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Z test and conditional merger of colliding pixels during batch building' [patent_app_type] => new [patent_app_number] => 10/317526 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10725 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20030090486.pdf [firstpage_image] =>[orig_patent_app_number] => 10317526 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317526
Z test and conditional merger of colliding pixels during batch building Dec 11, 2002 Issued
Array ( [id] => 7350588 [patent_doc_number] => 20040012596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Method and apparatus for loop and branch instructions in a programmable graphics pipeline' [patent_app_type] => new [patent_app_number] => 10/302411 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8940 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20040012596.pdf [firstpage_image] =>[orig_patent_app_number] => 10302411 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/302411
Method and apparatus for loop and branch instructions in a programmable graphics pipeline Nov 21, 2002 Issued
Array ( [id] => 7350602 [patent_doc_number] => 20040012598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Method and apparatus for modifying depth values using pixel programs' [patent_app_type] => new [patent_app_number] => 10/302464 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8979 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20040012598.pdf [firstpage_image] =>[orig_patent_app_number] => 10302464 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/302464
Method and apparatus for modifying depth values using pixel programs Nov 21, 2002 Issued
Array ( [id] => 6633101 [patent_doc_number] => 20030103056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'COMPUTER SYSTEM CONTROLLER HAVING INTERNAL MEMORY AND EXTERNAL MEMORY CONTROL' [patent_app_type] => new [patent_app_number] => 10/042751 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7120 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20030103056.pdf [firstpage_image] =>[orig_patent_app_number] => 10042751 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/042751
Computer system controller having internal memory and external memory control Nov 20, 2002 Issued
Array ( [id] => 6686919 [patent_doc_number] => 20030030642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Combined floating-point logic core and frame buffer' [patent_app_type] => new [patent_app_number] => 10/264524 [patent_app_country] => US [patent_app_date] => 2002-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4235 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030642.pdf [firstpage_image] =>[orig_patent_app_number] => 10264524 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/264524
Combined floating-point logic core and frame buffer Oct 3, 2002 Issued
Array ( [id] => 1231056 [patent_doc_number] => 06697074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-24 [patent_title] => 'Graphics system interface' [patent_app_type] => B2 [patent_app_number] => 10/207120 [patent_app_country] => US [patent_app_date] => 2002-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14228 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697074.pdf [firstpage_image] =>[orig_patent_app_number] => 10207120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/207120
Graphics system interface Jul 29, 2002 Issued
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