Search

James S Bergin

Examiner (ID: 145, Phone: (571)272-6872 , Office: P/3641 )

Most Active Art Unit
3641
Art Unit(s)
2164, 3616, 3643, 3624, 3641
Total Applications
1752
Issued Applications
1299
Pending Applications
160
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10733654 [patent_doc_number] => 20160079804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND OPERATION METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 14/941709 [patent_app_country] => US [patent_app_date] => 2015-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 16483 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14941709 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/941709
SEMICONDUCTOR INTEGRATED CIRCUIT AND OPERATION METHOD OF THE SAME Nov 15, 2015 Abandoned
Array ( [id] => 10698591 [patent_doc_number] => 20160044738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'WIRELESS COMMUNICATION DEVICE WITH CONNECTION RESTORATION AND METHODS FOR USE THEREWITH' [patent_app_type] => utility [patent_app_number] => 14/922384 [patent_app_country] => US [patent_app_date] => 2015-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14922384 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/922384
Wireless communication device with connection restoration and methods for use therewith Oct 25, 2015 Issued
Array ( [id] => 11563874 [patent_doc_number] => 09626465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Arbiter verification' [patent_app_type] => utility [patent_app_number] => 14/920445 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14728 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920445 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920445
Arbiter verification Oct 21, 2015 Issued
Array ( [id] => 12229169 [patent_doc_number] => 09916414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'Apparatus and method for generating test cases for processor verification, and verification device' [patent_app_type] => utility [patent_app_number] => 14/920548 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4762 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920548 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920548
Apparatus and method for generating test cases for processor verification, and verification device Oct 21, 2015 Issued
Array ( [id] => 11738357 [patent_doc_number] => 09702933 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-11 [patent_title] => 'System and method for concurrent interconnection diagnostics field' [patent_app_type] => utility [patent_app_number] => 14/920777 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7326 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920777 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920777
System and method for concurrent interconnection diagnostics field Oct 21, 2015 Issued
Array ( [id] => 11752568 [patent_doc_number] => 09710583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Information processing apparatus, state machine dividing method, and computer-readable recording medium' [patent_app_type] => utility [patent_app_number] => 14/918631 [patent_app_country] => US [patent_app_date] => 2015-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 15965 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918631 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/918631
Information processing apparatus, state machine dividing method, and computer-readable recording medium Oct 20, 2015 Issued
Array ( [id] => 12088447 [patent_doc_number] => 09842177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-12 [patent_title] => 'Behavioral modeling of jitter due to power supply noise for input/output buffers' [patent_app_type] => utility [patent_app_number] => 14/919374 [patent_app_country] => US [patent_app_date] => 2015-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14919374 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/919374
Behavioral modeling of jitter due to power supply noise for input/output buffers Oct 20, 2015 Issued
Array ( [id] => 11917545 [patent_doc_number] => 09785733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-10 [patent_title] => 'Non-transitory computer-readable recording medium having stored therein design program, information processing apparatus, and computer-implemented method for designing' [patent_app_type] => utility [patent_app_number] => 14/918641 [patent_app_country] => US [patent_app_date] => 2015-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 51 [patent_no_of_words] => 16114 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918641 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/918641
Non-transitory computer-readable recording medium having stored therein design program, information processing apparatus, and computer-implemented method for designing Oct 20, 2015 Issued
Array ( [id] => 10764328 [patent_doc_number] => 20160110483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'METHOD OF OPERATING SIMULATOR COMPENSATING FOR DELAY AND DEVICE FOR PEROFMRING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/887789 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7868 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14887789 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/887789
Method of operating simulator compensating for delay and device for performing the same Oct 19, 2015 Issued
Array ( [id] => 11570815 [patent_doc_number] => 20170109459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'Simultaneous Retargeting Of Layout Features Based On Process Window Simulation' [patent_app_type] => utility [patent_app_number] => 14/918266 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918266 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/918266
Simultaneous retargeting of layout features based on process window simulation Oct 19, 2015 Issued
Array ( [id] => 11109943 [patent_doc_number] => 20160306913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'METHOD AND APPARATUS FOR SYSTEM DESIGN VERIFICATION' [patent_app_type] => utility [patent_app_number] => 14/887335 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2810 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14887335 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/887335
Method and apparatus for system design verification Oct 19, 2015 Issued
Array ( [id] => 11125876 [patent_doc_number] => 20160322852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'WIRELESS CHARGING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/861041 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7957 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14861041 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/861041
WIRELESS CHARGING DEVICE Sep 21, 2015 Abandoned
Array ( [id] => 11125877 [patent_doc_number] => 20160322851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'HANGING-TYPE FLEXIBLE WIRELESS CHARGING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/861008 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8059 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14861008 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/861008
HANGING-TYPE FLEXIBLE WIRELESS CHARGING DEVICE Sep 21, 2015 Abandoned
Array ( [id] => 11125182 [patent_doc_number] => 20160322156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'THIN-FILM COIL ASSEMBLY, FLEXIBLE WIRELESS CHARGING DEVICE AND WIRELESS CHARGING SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/860936 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14860936 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/860936
THIN-FILM COIL ASSEMBLY, FLEXIBLE WIRELESS CHARGING DEVICE AND WIRELESS CHARGING SYSTEM Sep 21, 2015 Abandoned
Array ( [id] => 11431261 [patent_doc_number] => 09569580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Integrated circuit design changes using through-silicon vias' [patent_app_type] => utility [patent_app_number] => 14/852707 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11354 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14852707 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/852707
Integrated circuit design changes using through-silicon vias Sep 13, 2015 Issued
Array ( [id] => 10494156 [patent_doc_number] => 20150379177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'COMPUTER PRODUCT FOR SUPPORTING DESIGN AND VERIFICATION OF INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/851501 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9783 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14851501 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/851501
Computer product for supporting design and verification of integrated circuit Sep 10, 2015 Issued
Array ( [id] => 11226913 [patent_doc_number] => 09454637 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Validating integrated circuit simulation results' [patent_app_type] => utility [patent_app_number] => 14/839824 [patent_app_country] => US [patent_app_date] => 2015-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14839824 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/839824
Validating integrated circuit simulation results Aug 27, 2015 Issued
Array ( [id] => 10478524 [patent_doc_number] => 20150363541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'EDA TOOL AND METHOD FOR CONFLICT DETECTION DURING MULTI-PATTERNING LITHOGRAPHY' [patent_app_type] => utility [patent_app_number] => 14/833364 [patent_app_country] => US [patent_app_date] => 2015-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14833364 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/833364
EDA tool and method for conflict detection during multi-patterning lithography Aug 23, 2015 Issued
Array ( [id] => 10178070 [patent_doc_number] => 09208276 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-08 [patent_title] => 'Method for generating layout pattern' [patent_app_type] => utility [patent_app_number] => 14/822907 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4916 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14822907 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/822907
Method for generating layout pattern Aug 10, 2015 Issued
Array ( [id] => 10717015 [patent_doc_number] => 20160063162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'SYSTEM AND METHOD USING PASS/FAIL TEST RESULTS TO PRIORITIZE ELECTRONIC DESIGN VERIFICATION REVIEW' [patent_app_type] => utility [patent_app_number] => 14/812109 [patent_app_country] => US [patent_app_date] => 2015-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2773 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14812109 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/812109
SYSTEM AND METHOD USING PASS/FAIL TEST RESULTS TO PRIORITIZE ELECTRONIC DESIGN VERIFICATION REVIEW Jul 28, 2015 Abandoned
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