James S Bergin

Array ( [id] => 9730329 [patent_doc_number] => 20140266036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'APPARATUS AND METHOD FOR DETECTING FOREIGN OBJECT IN WIRELESS POWER TRANSMITTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/213923 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10884 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14213923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11230461 [patent_doc_number] => 09457680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Vehicle-to-grid control' [patent_app_type] => utility [patent_app_number] => 14/214318 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14214318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9730368 [patent_doc_number] => 20140266075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Methods Of Enhancing Electrochemical Double Layer Capacitor (EDLC) Performance And EDLC Devices Formed Therefrom' [patent_app_type] => utility [patent_app_number] => 14/214574 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 25306 [patent_no_of_claims] => 91 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14214574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9726738 [patent_doc_number] => 20140262445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'METHODS AND CIRCUIT STRUCTURES FOR MITIGATING VOLTAGE STRESSES ON PRINTED CIRCUIT BOARD (PCB) IN HIGH VOLTAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 14/206366 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14206366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10363508 [patent_doc_number] => 20150248513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'INTEGRATED CIRCUIT DESIGN TIMING PATH VERIFICATION TOOL' [patent_app_type] => utility [patent_app_number] => 14/195815 [patent_app_country] => US [patent_app_date] => 2014-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14195815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10357556 [patent_doc_number] => 20150242561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'EFFICIENT EXTRACTION FOR COLORLESS MULTI PATTERNING' [patent_app_type] => utility [patent_app_number] => 14/191981 [patent_app_country] => US [patent_app_date] => 2014-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14191981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9746574 [patent_doc_number] => 20140282293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'EDA TOOL AND METHOD FOR CONFLICT DETECTION DURING MULTI-PATTERNING LITHOGRAPHY' [patent_app_type] => utility [patent_app_number] => 14/187421 [patent_app_country] => US [patent_app_date] => 2014-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14187421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10550549 [patent_doc_number] => 09275175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Integrated circuit clock tree visualizer' [patent_app_type] => utility [patent_app_number] => 14/179127 [patent_app_country] => US [patent_app_date] => 2014-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3324 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14179127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10342663 [patent_doc_number] => 20150227669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'CIRCUIT-LEVEL ABSTRACTION OF MULTIGATE DEVICES USING TWO-DIMENSIONAL TECHNOLOGY COMPUTER AIDED DESIGN' [patent_app_type] => utility [patent_app_number] => 14/176740 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9520728 [patent_doc_number] => 20140157220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'LAYOUT DESIGN APPARATUS AND LAYOUT DESIGN METHOD' [patent_app_type] => utility [patent_app_number] => 14/175000 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7521 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10144282 [patent_doc_number] => 09177091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Row formation during datapath placement in circuit design' [patent_app_type] => utility [patent_app_number] => 14/173618 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8468 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173618 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10184113 [patent_doc_number] => 09213794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'System and method for routing buffered interconnects in an integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/170195 [patent_app_country] => US [patent_app_date] => 2014-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14170195 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9632306 [patent_doc_number] => 20140210414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'STORAGE BATTERY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/159142 [patent_app_country] => US [patent_app_date] => 2014-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7188 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14159142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10322350 [patent_doc_number] => 20150207354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'METHODS AND APPARATUS FOR BATTERY CHARACTERISTIC CONVERSION' [patent_app_type] => utility [patent_app_number] => 14/158988 [patent_app_country] => US [patent_app_date] => 2014-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4310 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158988 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10319924 [patent_doc_number] => 20150204928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'METHOD AND APPARATUS TO ALIGN WIRELESS CHARGING COILS' [patent_app_type] => utility [patent_app_number] => 14/158060 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9613906 [patent_doc_number] => 20140203763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-24 [patent_title] => 'STEP-UP BATTERY CHARGING MANAGEMENT SYSTEM AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/158296 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5315 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9613929 [patent_doc_number] => 20140203786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-24 [patent_title] => 'POWER SUPPLY APPARATUS AND POWER SUPPLY CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/158442 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10525 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10188368 [patent_doc_number] => 09217781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Time synchronization between battery controller modules for parameter measurements' [patent_app_type] => utility [patent_app_number] => 14/156569 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3250 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14156569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12020171 [patent_doc_number] => 09812888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Electrochemical cell or battery with reduced impedance and method for producing same' [patent_app_type] => utility [patent_app_number] => 14/156563 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3128 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14156563 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9639853 [patent_doc_number] => 20140217963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'PROTECTIVE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/156452 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4051 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14156452 [rel_patent_id] =>[rel_patent_doc_number] =>)