Search

Kevin P Shaver

Supervisory Patent Examiner (ID: 9936, Phone: (571)272-4720 , Office: P/3754 )

Most Active Art Unit
3104
Art Unit(s)
3754, 3752, 3732, 2899, 3736, 3104, 3108, 3101
Total Applications
1590
Issued Applications
1285
Pending Applications
77
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16889110 [patent_doc_number] => 20210175307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => AMOLED AND MICRO-OLED FOR AUGMENTED REALITY AND AUTOSTEREOSCOPIC 3D DISPLAYS [patent_app_type] => utility [patent_app_number] => 16/702942 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16702942 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/702942
AMOLED and micro-OLED for augmented reality and autostereoscopic 3D displays Dec 3, 2019 Issued
Array ( [id] => 17122225 [patent_doc_number] => 11133369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Flexible display panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/699503 [patent_app_country] => US [patent_app_date] => 2019-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 14445 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 453 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16699503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/699503
Flexible display panel and manufacturing method thereof Nov 28, 2019 Issued
Array ( [id] => 16001659 [patent_doc_number] => 20200176700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SURFACE-PLASMON-PUMPED LIGHT EMITTING DEVICES [patent_app_type] => utility [patent_app_number] => 16/688225 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688225 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/688225
Surface-plasmon-pumped light emitting devices Nov 18, 2019 Issued
Array ( [id] => 17287971 [patent_doc_number] => 11204518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Display panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/687542 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9724 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687542
Display panel and manufacturing method thereof Nov 17, 2019 Issued
Array ( [id] => 17607177 [patent_doc_number] => 11335669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Wafer level chip scale filter packaging using semiconductor wafers with through wafer vias [patent_app_type] => utility [patent_app_number] => 16/683592 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 65 [patent_no_of_words] => 8918 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683592
Wafer level chip scale filter packaging using semiconductor wafers with through wafer vias Nov 13, 2019 Issued
Array ( [id] => 16241713 [patent_doc_number] => 20200258947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => DISPLAY APPARATUS INCLUDING A CATHODE LAYER WITH MULTIPLE LAYERS AND METHOD OF MANUFACTURING THE DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/682580 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682580
Display apparatus including a cathode layer with multiple layers and method of manufacturing the display apparatus Nov 12, 2019 Issued
Array ( [id] => 18054204 [patent_doc_number] => 11527599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Array substrate, method for fabricating the same display panel, and display device [patent_app_type] => utility [patent_app_number] => 16/665410 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3071 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16665410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/665410
Array substrate, method for fabricating the same display panel, and display device Oct 27, 2019 Issued
Array ( [id] => 18277158 [patent_doc_number] => 11616108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Organic light emitting diode display [patent_app_type] => utility [patent_app_number] => 16/661329 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 15535 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661329 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/661329
Organic light emitting diode display Oct 22, 2019 Issued
Array ( [id] => 15369783 [patent_doc_number] => 20200020656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => ALLOY DIFFUSION BARRIER LAYER [patent_app_type] => utility [patent_app_number] => 16/580973 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580973 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580973
ALLOY DIFFUSION BARRIER LAYER Sep 23, 2019 Abandoned
Array ( [id] => 16560296 [patent_doc_number] => 20210005445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => TECHNIQUES FOR REDUCING TIP TO TIP SHORTING AND CRITICAL DIMENSION VARIATION DURING NANOSCALE PATTERNING [patent_app_type] => utility [patent_app_number] => 16/569944 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569944
Techniques for reducing tip to tip shorting and critical dimension variation during nanoscale patterning Sep 12, 2019 Issued
Array ( [id] => 16988018 [patent_doc_number] => 11075201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Tuning tensile strain on FinFET [patent_app_type] => utility [patent_app_number] => 16/569843 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 2979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569843 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569843
Tuning tensile strain on FinFET Sep 12, 2019 Issued
Array ( [id] => 15274657 [patent_doc_number] => 20190386063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => Memory Arrays And Methods Of Forming An Array Of Memory Cells [patent_app_type] => utility [patent_app_number] => 16/556615 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556615
Memory arrays and methods of forming an array of memory cells Aug 29, 2019 Issued
Array ( [id] => 15218013 [patent_doc_number] => 20190371693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => MICROELECTRONIC DEVICES, STACKED MICROELECTRONIC DEVICES, AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 16/543430 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543430
Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices Aug 15, 2019 Issued
Array ( [id] => 15184819 [patent_doc_number] => 20190363001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/537564 [patent_app_country] => US [patent_app_date] => 2019-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537564
3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE Aug 9, 2019 Pending
Array ( [id] => 15046105 [patent_doc_number] => 20190334057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => LIGHT-EMITTING DIODE SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/507262 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507262 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507262
Light-emitting diode substrate and manufacturing method thereof, and display device Jul 9, 2019 Issued
Array ( [id] => 17085438 [patent_doc_number] => 20210280445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/257637 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17257637 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/257637
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD Jun 24, 2019 Pending
Array ( [id] => 14938297 [patent_doc_number] => 20190304787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/444397 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444397
Method of manufacturing silicon carbide semiconductor device Jun 17, 2019 Issued
Array ( [id] => 16148483 [patent_doc_number] => 10707323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Method of forming metal contacts in the barrier layer of a group III-N HEMT [patent_app_type] => utility [patent_app_number] => 16/420713 [patent_app_country] => US [patent_app_date] => 2019-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2678 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420713 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420713
Method of forming metal contacts in the barrier layer of a group III-N HEMT May 22, 2019 Issued
Array ( [id] => 14785133 [patent_doc_number] => 20190267464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => EXTENDED CONTACT AREA USING UNDERCUT SILICIDE EXTENSIONS [patent_app_type] => utility [patent_app_number] => 16/412526 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412526 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/412526
EXTENDED CONTACT AREA USING UNDERCUT SILICIDE EXTENSIONS May 14, 2019 Abandoned
Array ( [id] => 15045621 [patent_doc_number] => 20190333815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => METHOD OF REDUCING CROSS CONTAMINATION DURING MANUFACTURE OF COPPER-CONTACT AND GOLD-CONTACT GAAS WAFERS USING SHARED EQUIPMENT [patent_app_type] => utility [patent_app_number] => 16/412893 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412893 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/412893
METHOD OF REDUCING CROSS CONTAMINATION DURING MANUFACTURE OF COPPER-CONTACT AND GOLD-CONTACT GAAS WAFERS USING SHARED EQUIPMENT May 14, 2019 Abandoned
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