Search

Kuen S Lu

Examiner (ID: 17648, Phone: (571)272-4114 , Office: P/2156 )

Most Active Art Unit
2156
Art Unit(s)
2167, 2169, 2156, 2177
Total Applications
1324
Issued Applications
1076
Pending Applications
78
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
09/495756 Method and system for resource allocation Jan 31, 2000 Abandoned
Array ( [id] => 7595880 [patent_doc_number] => 07620702 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-17 [patent_title] => 'Providing real-time control data for a network processor' [patent_app_type] => utility [patent_app_number] => 09/473571 [patent_app_country] => US [patent_app_date] => 1999-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4304 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/620/07620702.pdf [firstpage_image] =>[orig_patent_app_number] => 09473571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/473571
Providing real-time control data for a network processor Dec 27, 1999 Issued
Array ( [id] => 832304 [patent_doc_number] => 07401112 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-15 [patent_title] => 'Methods and apparatus for executing a transaction task within a transaction processing system employing symmetric multiprocessors' [patent_app_type] => utility [patent_app_number] => 09/320252 [patent_app_country] => US [patent_app_date] => 1999-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5471 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/401/07401112.pdf [firstpage_image] =>[orig_patent_app_number] => 09320252 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/320252
Methods and apparatus for executing a transaction task within a transaction processing system employing symmetric multiprocessors May 25, 1999 Issued
09/318913 APPARATUS, METHOD AND COMPUTER PROGRAM FOR DYNAMIC SLIP CONTROL IN REAL-TIME SCHEDULING May 25, 1999 Abandoned
Array ( [id] => 1430011 [patent_doc_number] => 06526431 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Maintaining extended and traditional states of a processing unit in task switching' [patent_app_type] => B1 [patent_app_number] => 09/257923 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4281 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526431.pdf [firstpage_image] =>[orig_patent_app_number] => 09257923 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257923
Maintaining extended and traditional states of a processing unit in task switching Feb 25, 1999 Issued
Array ( [id] => 918520 [patent_doc_number] => 07328270 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-02-05 [patent_title] => 'Communication protocol processor having multiple microprocessor cores connected in series and dynamically reprogrammed during operation via instructions transmitted along the same data paths used to convey communication data' [patent_app_type] => utility [patent_app_number] => 09/257521 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6516 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/328/07328270.pdf [firstpage_image] =>[orig_patent_app_number] => 09257521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257521
Communication protocol processor having multiple microprocessor cores connected in series and dynamically reprogrammed during operation via instructions transmitted along the same data paths used to convey communication data Feb 24, 1999 Issued
Array ( [id] => 869209 [patent_doc_number] => 07370325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-06 [patent_title] => 'Eager evaluation of tasks in a workflow system' [patent_app_type] => utility [patent_app_number] => 09/251998 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 50 [patent_no_of_words] => 27823 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/370/07370325.pdf [firstpage_image] =>[orig_patent_app_number] => 09251998 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251998
Eager evaluation of tasks in a workflow system Feb 18, 1999 Issued
Array ( [id] => 695029 [patent_doc_number] => 07076546 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-11 [patent_title] => 'Browser for use in accessing hypertext documents in a multi-user computer environment' [patent_app_type] => utility [patent_app_number] => 09/247502 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 9867 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/076/07076546.pdf [firstpage_image] =>[orig_patent_app_number] => 09247502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247502
Browser for use in accessing hypertext documents in a multi-user computer environment Feb 9, 1999 Issued
09/221952 INFORMATION AND RESOURCE MANAGEMENT BY COORDINATED ACQUISITION AND DISTRIBUTION Dec 27, 1998 Abandoned
Array ( [id] => 7600124 [patent_doc_number] => 07386586 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-06-10 [patent_title] => 'System for scheduling and monitoring computer processes' [patent_app_type] => utility [patent_app_number] => 09/219071 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 65 [patent_no_of_words] => 16360 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/386/07386586.pdf [firstpage_image] =>[orig_patent_app_number] => 09219071 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219071
System for scheduling and monitoring computer processes Dec 21, 1998 Issued
Array ( [id] => 4057745 [patent_doc_number] => 05875340 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Optimized storage system and method for a processor that executes instructions out of order' [patent_app_type] => 1 [patent_app_number] => 8/658909 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8485 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/875/05875340.pdf [firstpage_image] =>[orig_patent_app_number] => 658909 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/658909
Optimized storage system and method for a processor that executes instructions out of order May 30, 1996 Issued
Menu