Search

Phat X Cao

Examiner (ID: 14051, Phone: (571)272-1703 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2508, 2814, 2817
Total Applications
1637
Issued Applications
1183
Pending Applications
94
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9765284 [patent_doc_number] => 08849631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Protocol independent telephony call lifecycle management scheme' [patent_app_type] => utility [patent_app_number] => 12/119554 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4698 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12119554 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119554
Protocol independent telephony call lifecycle management scheme May 12, 2008 Issued
Array ( [id] => 4780233 [patent_doc_number] => 20080288231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Apparatus and method for cooperation verification' [patent_app_type] => utility [patent_app_number] => 12/149993 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5442 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20080288231.pdf [firstpage_image] =>[orig_patent_app_number] => 12149993 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/149993
Apparatus and method for cooperation verification May 11, 2008 Abandoned
Array ( [id] => 9967389 [patent_doc_number] => 09015020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Method and system for testing a building control system' [patent_app_type] => utility [patent_app_number] => 12/148868 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4888 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12148868 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/148868
Method and system for testing a building control system Apr 21, 2008 Issued
Array ( [id] => 4861234 [patent_doc_number] => 20080270084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Tire Design Method' [patent_app_type] => utility [patent_app_number] => 12/106384 [patent_app_country] => US [patent_app_date] => 2008-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4854 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20080270084.pdf [firstpage_image] =>[orig_patent_app_number] => 12106384 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/106384
Tire Design Method Apr 20, 2008 Abandoned
Array ( [id] => 8010035 [patent_doc_number] => 08086428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Tire design method' [patent_app_type] => utility [patent_app_number] => 12/098780 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6337 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/086/08086428.pdf [firstpage_image] =>[orig_patent_app_number] => 12098780 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/098780
Tire design method Apr 6, 2008 Issued
Array ( [id] => 5516211 [patent_doc_number] => 20090216518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'EMULATED MULTI-TASKING MULTI-PROCESSOR CHANNELS IMPLEMENTING STANDARD NETWORK PROTOCOLS' [patent_app_type] => utility [patent_app_number] => 12/036986 [patent_app_country] => US [patent_app_date] => 2008-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20090216518.pdf [firstpage_image] =>[orig_patent_app_number] => 12036986 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/036986
Emulated multi-tasking multi-processor channels implementing standard network protocols Feb 24, 2008 Issued
Array ( [id] => 9485937 [patent_doc_number] => 08731899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Adapter assembly for concurrent emulation of a native channel' [patent_app_type] => utility [patent_app_number] => 12/035182 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12035182 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/035182
Adapter assembly for concurrent emulation of a native channel Feb 20, 2008 Issued
Array ( [id] => 9088850 [patent_doc_number] => 08560294 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-15 [patent_title] => 'Method and apparatus for an automated input/output buffer information specification model generator' [patent_app_type] => utility [patent_app_number] => 12/034368 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12034368 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034368
Method and apparatus for an automated input/output buffer information specification model generator Feb 19, 2008 Issued
Array ( [id] => 4888474 [patent_doc_number] => 20080262806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'FREQUENCY RESPONSE OPTIMISATION OF A MOVEMENT SIMULATOR BY ADAPTIVE SINUSOIDAL REFERENCE TRACKING' [patent_app_type] => utility [patent_app_number] => 12/017559 [patent_app_country] => US [patent_app_date] => 2008-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20080262806.pdf [firstpage_image] =>[orig_patent_app_number] => 12017559 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017559
Frequency response optimisation of a movement simulator by adaptive sinusoidal reference tracking Jan 21, 2008 Issued
Array ( [id] => 4519786 [patent_doc_number] => 07917348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Method of switching external models in an automated system-on-chip integrated circuit design verification system' [patent_app_type] => utility [patent_app_number] => 11/969991 [patent_app_country] => US [patent_app_date] => 2008-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5279 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/917/07917348.pdf [firstpage_image] =>[orig_patent_app_number] => 11969991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/969991
Method of switching external models in an automated system-on-chip integrated circuit design verification system Jan 6, 2008 Issued
Array ( [id] => 5437039 [patent_doc_number] => 20090171626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Integrated Engineering Analysis System' [patent_app_type] => utility [patent_app_number] => 11/965381 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3153 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20090171626.pdf [firstpage_image] =>[orig_patent_app_number] => 11965381 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965381
Integrated Engineering Analysis System Dec 26, 2007 Abandoned
Array ( [id] => 5437060 [patent_doc_number] => 20090171647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'INTERCONNECT ARCHITECTURAL STATE COVERAGE MEASUREMENT METHODOLOGY' [patent_app_type] => utility [patent_app_number] => 11/965158 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6179 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20090171647.pdf [firstpage_image] =>[orig_patent_app_number] => 11965158 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965158
INTERCONNECT ARCHITECTURAL STATE COVERAGE MEASUREMENT METHODOLOGY Dec 26, 2007 Abandoned
Array ( [id] => 5437044 [patent_doc_number] => 20090171631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Integrated Engineering Analysis Process' [patent_app_type] => utility [patent_app_number] => 11/965396 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3177 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20090171631.pdf [firstpage_image] =>[orig_patent_app_number] => 11965396 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965396
Integrated Engineering Analysis Process Dec 26, 2007 Abandoned
Array ( [id] => 5503498 [patent_doc_number] => 20090164186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'Method for determining improved estimates of properties of a model' [patent_app_type] => utility [patent_app_number] => 12/004651 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5820 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12004651 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/004651
Method for determining improved estimates of properties of a model Dec 19, 2007 Abandoned
Array ( [id] => 4754024 [patent_doc_number] => 20080162100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'METHOD, SYSTEM AND PROGRAM STORAGE DEVICE FOR HISTORY MATCHING AND FORECASTING OF HYDROCARBON-BEARING RESERVOIRS UTILIZING PROXIES FOR LIKELIHOOD FUNCTIONS' [patent_app_type] => utility [patent_app_number] => 11/960288 [patent_app_country] => US [patent_app_date] => 2007-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5967 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20080162100.pdf [firstpage_image] =>[orig_patent_app_number] => 11960288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/960288
Method, system and program storage device for history matching and forecasting of hydrocarbon-bearing reservoirs utilizing proxies for likelihood functions Dec 18, 2007 Issued
Array ( [id] => 10834264 [patent_doc_number] => 08862453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Techniques for incorporating timing jitter and/or amplitude noise into hardware description language-based input stimuli' [patent_app_type] => utility [patent_app_number] => 11/958873 [patent_app_country] => US [patent_app_date] => 2007-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 9796 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11958873 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/958873
Techniques for incorporating timing jitter and/or amplitude noise into hardware description language-based input stimuli Dec 17, 2007 Issued
Array ( [id] => 9416327 [patent_doc_number] => 08700378 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-15 [patent_title] => 'Symbolic expression propagation to support generating reconfiguration code' [patent_app_type] => utility [patent_app_number] => 12/000436 [patent_app_country] => US [patent_app_date] => 2007-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 10542 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12000436 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/000436
Symbolic expression propagation to support generating reconfiguration code Dec 11, 2007 Issued
Array ( [id] => 9973753 [patent_doc_number] => 09020786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Analyzing structural durability in the frequency domain' [patent_app_type] => utility [patent_app_number] => 11/948880 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11948880 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/948880
Analyzing structural durability in the frequency domain Nov 29, 2007 Issued
Array ( [id] => 8010051 [patent_doc_number] => 08086436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Preliminary data representations of a deployment activity model' [patent_app_type] => utility [patent_app_number] => 11/929564 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5556 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/086/08086436.pdf [firstpage_image] =>[orig_patent_app_number] => 11929564 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/929564
Preliminary data representations of a deployment activity model Oct 29, 2007 Issued
Array ( [id] => 4847742 [patent_doc_number] => 20080184150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'ELECTRONIC CIRCUIT DESIGN ANALYSIS TOOL FOR MULTI-PROCESSOR ENVIRONMENTS' [patent_app_type] => utility [patent_app_number] => 11/929764 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9931 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20080184150.pdf [firstpage_image] =>[orig_patent_app_number] => 11929764 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/929764
ELECTRONIC CIRCUIT DESIGN ANALYSIS TOOL FOR MULTI-PROCESSOR ENVIRONMENTS Oct 29, 2007 Abandoned
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