Quocan B Vo
Examiner (ID: 17405)
Most Active Art Unit | 1798 |
Art Unit(s) | 1798 |
Total Applications | 81 |
Issued Applications | 47 |
Pending Applications | 2 |
Abandoned Applications | 32 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 15458769
[patent_doc_number] => 20200042209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-06
[patent_title] => DEVICE, SYSTEM AND METHOD TO GENERATE LINK TRAINING SIGNALS
[patent_app_type] => utility
[patent_app_number] => 16/390551
[patent_app_country] => US
[patent_app_date] => 2019-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10264
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390551
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/390551 | Device, system and method to generate link training signals | Apr 21, 2019 | Issued |
Array
(
[id] => 17729408
[patent_doc_number] => 11385795
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Method and apparatus to enable individual non volatile memory express (NVMe) input/output (IO) queues on differing network addresses of an NVMe controller
[patent_app_type] => utility
[patent_app_number] => 16/381994
[patent_app_country] => US
[patent_app_date] => 2019-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8012
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16381994
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/381994 | Method and apparatus to enable individual non volatile memory express (NVMe) input/output (IO) queues on differing network addresses of an NVMe controller | Apr 10, 2019 | Issued |
Array
(
[id] => 17786324
[patent_doc_number] => 11409447
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-08-09
[patent_title] => System and method for implementing non-blocking, concurrent hash tables
[patent_app_type] => utility
[patent_app_number] => 16/380744
[patent_app_country] => US
[patent_app_date] => 2019-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 34
[patent_no_of_words] => 9661
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380744
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/380744 | System and method for implementing non-blocking, concurrent hash tables | Apr 9, 2019 | Issued |
Array
(
[id] => 15151613
[patent_doc_number] => 20190354284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => IMPLIED DIRECTORY STATE UPDATES
[patent_app_type] => utility
[patent_app_number] => 16/372247
[patent_app_country] => US
[patent_app_date] => 2019-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22272
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372247
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/372247 | IMPLIED DIRECTORY STATE UPDATES | Mar 31, 2019 | Abandoned |
Array
(
[id] => 16844592
[patent_doc_number] => 11016677
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-25
[patent_title] => Dual-splitter for high performance replication
[patent_app_type] => utility
[patent_app_number] => 16/367630
[patent_app_country] => US
[patent_app_date] => 2019-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5959
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16367630
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/367630 | Dual-splitter for high performance replication | Mar 27, 2019 | Issued |
Array
(
[id] => 17252770
[patent_doc_number] => 11188259
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-30
[patent_title] => Storage device and method of operating the storage device
[patent_app_type] => utility
[patent_app_number] => 16/361253
[patent_app_country] => US
[patent_app_date] => 2019-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 11075
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361253
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/361253 | Storage device and method of operating the storage device | Mar 21, 2019 | Issued |
Array
(
[id] => 14585167
[patent_doc_number] => 20190220192
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-18
[patent_title] => HOST CONTROLLED ENABLEMENT OF AUTOMATIC BACKGROUND OPERATIONS IN A MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/361445
[patent_app_country] => US
[patent_app_date] => 2019-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3704
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361445
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/361445 | Host controlled enablement of automatic background operations in a memory device | Mar 21, 2019 | Issued |
Array
(
[id] => 16330871
[patent_doc_number] => 20200301837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-24
[patent_title] => DATA PROCESSING
[patent_app_type] => utility
[patent_app_number] => 16/361548
[patent_app_country] => US
[patent_app_date] => 2019-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6859
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16361548
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/361548 | Data processing | Mar 21, 2019 | Issued |
Array
(
[id] => 16017487
[patent_doc_number] => 20200183587
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-11
[patent_title] => OBJECT TIERING IN A DISTRIBUTED STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/359658
[patent_app_country] => US
[patent_app_date] => 2019-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16359658
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/359658 | Object tiering in a distributed storage system | Mar 19, 2019 | Issued |
Array
(
[id] => 16299860
[patent_doc_number] => 20200285583
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-10
[patent_title] => DETERMINING LOGICAL ADDRESS OF AN OLDEST MEMORY ACCESS REQUEST
[patent_app_type] => utility
[patent_app_number] => 16/295117
[patent_app_country] => US
[patent_app_date] => 2019-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5046
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295117
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/295117 | Determining logical address of an oldest memory access request | Mar 6, 2019 | Issued |
Array
(
[id] => 17424091
[patent_doc_number] => 11257552
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-22
[patent_title] => Programming a memory device
[patent_app_type] => utility
[patent_app_number] => 16/281258
[patent_app_country] => US
[patent_app_date] => 2019-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 8176
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16281258
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/281258 | Programming a memory device | Feb 20, 2019 | Issued |
Array
(
[id] => 16255424
[patent_doc_number] => 20200264798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => MIGRATION OF DATA FROM A STORAGE CONTROLLER TO CLOUD STORAGE BY USING PARALLEL READERS FOR THE DATA
[patent_app_type] => utility
[patent_app_number] => 16/280980
[patent_app_country] => US
[patent_app_date] => 2019-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6486
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16280980
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/280980 | Migration of data from a storage controller to cloud storage by using parallel readers for the data | Feb 19, 2019 | Issued |
Array
(
[id] => 16255418
[patent_doc_number] => 20200264792
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => SYSTEMS AND METHODS FOR BALANCING MULTIPLE PARTITIONS OF NON-VOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/277230
[patent_app_country] => US
[patent_app_date] => 2019-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5797
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277230
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/277230 | Systems and methods for balancing multiple partitions of non-volatile memory | Feb 14, 2019 | Issued |
Array
(
[id] => 14719565
[patent_doc_number] => 20190250846
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-15
[patent_title] => METHOD AND SYSTEM FOR OPTIMISTIC FLOW CONTROL FOR PUSH-BASED INPUT/OUTPUT WITH BUFFER STEALING
[patent_app_type] => utility
[patent_app_number] => 16/277507
[patent_app_country] => US
[patent_app_date] => 2019-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6661
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277507
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/277507 | Method and system for optimistic flow control for push-based input/output with buffer stealing | Feb 14, 2019 | Issued |
Array
(
[id] => 16833820
[patent_doc_number] => 11010071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-18
[patent_title] => Solid state drive that allocates stream data to super blocks based on stream information and a memory allocation method thereof
[patent_app_type] => utility
[patent_app_number] => 16/266187
[patent_app_country] => US
[patent_app_date] => 2019-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 10151
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16266187
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/266187 | Solid state drive that allocates stream data to super blocks based on stream information and a memory allocation method thereof | Feb 3, 2019 | Issued |
Array
(
[id] => 16208793
[patent_doc_number] => 20200241783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => INLINING DATA IN INODES
[patent_app_type] => utility
[patent_app_number] => 16/260991
[patent_app_country] => US
[patent_app_date] => 2019-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11500
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16260991
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/260991 | Inlining data in inodes | Jan 28, 2019 | Issued |
Array
(
[id] => 16462889
[patent_doc_number] => 10846237
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-24
[patent_title] => Methods and apparatus for locking at least a portion of a shared memory resource
[patent_app_type] => utility
[patent_app_number] => 16/259957
[patent_app_country] => US
[patent_app_date] => 2019-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 29
[patent_no_of_words] => 16952
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16259957
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/259957 | Methods and apparatus for locking at least a portion of a shared memory resource | Jan 27, 2019 | Issued |
Array
(
[id] => 16706155
[patent_doc_number] => 10956086
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-23
[patent_title] => Memory controller
[patent_app_type] => utility
[patent_app_number] => 16/259862
[patent_app_country] => US
[patent_app_date] => 2019-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 25217
[patent_no_of_claims] => 49
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 327
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16259862
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/259862 | Memory controller | Jan 27, 2019 | Issued |
Array
(
[id] => 16595047
[patent_doc_number] => 10904336
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Predictive rebalancing according to future usage expectations
[patent_app_type] => utility
[patent_app_number] => 16/256177
[patent_app_country] => US
[patent_app_date] => 2019-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 9743
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256177
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/256177 | Predictive rebalancing according to future usage expectations | Jan 23, 2019 | Issued |
Array
(
[id] => 16972220
[patent_doc_number] => 11068191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-20
[patent_title] => Adaptive replication modes in a storage system
[patent_app_type] => utility
[patent_app_number] => 16/254897
[patent_app_country] => US
[patent_app_date] => 2019-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6518
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16254897
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/254897 | Adaptive replication modes in a storage system | Jan 22, 2019 | Issued |