Search

Robert Scott Carrico

Examiner (ID: 15121, Phone: (571)270-5504 , Office: P/1727 )

Most Active Art Unit
1727
Art Unit(s)
1727
Total Applications
625
Issued Applications
350
Pending Applications
72
Abandoned Applications
203

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9571671 [patent_doc_number] => 20140189384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'METHOD AND ARRANGMENT FOR REMOTE CONTROLLING A POWER CONSUMPTION STATE OF A NETWORK DEVICE' [patent_app_type] => utility [patent_app_number] => 14/141710 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7867 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141710 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141710
Method and arrangement for remote controlling a power consumption state of a network device Dec 26, 2013 Issued
Array ( [id] => 9604867 [patent_doc_number] => 20140201549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND COMPUTER PROGRAM PRODUCT' [patent_app_type] => utility [patent_app_number] => 14/141535 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7089 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141535 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141535
Information processing apparatus, information processing system, and computer program product Dec 26, 2013 Issued
Array ( [id] => 10269404 [patent_doc_number] => 20150154401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'COMPUTING DEVICE AND METHOD FOR BOOTING THE COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/141461 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1360 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141461 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141461
COMPUTING DEVICE AND METHOD FOR BOOTING THE COMPUTING DEVICE Dec 26, 2013 Abandoned
Array ( [id] => 9571625 [patent_doc_number] => 20140189338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR DETECTING BOOTING TIME PERIOD FOR ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/140555 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1225 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140555 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/140555
ELECTRONIC DEVICE AND METHOD FOR DETECTING BOOTING TIME PERIOD FOR ELECTRONIC DEVICE Dec 25, 2013 Abandoned
Array ( [id] => 9571620 [patent_doc_number] => 20140189334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'ELECTRONIC APPARATUS HIBERNATION RECOVERY SETTING METHOD AND ELECTRONIC APPARATUS HAVING HIBERNATION STATE AND HIBERNATION RECOVERY MECHANISM' [patent_app_type] => utility [patent_app_number] => 14/140648 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2484 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140648 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/140648
Electronic apparatus hibernation recovery setting method and electronic apparatus having hibernation state and hibernation recovery mechanism Dec 25, 2013 Issued
Array ( [id] => 10292818 [patent_doc_number] => 20150177817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'SYSTEMS AND TECHNIQUES FOR CONTROL OF STORAGE DEVICE POWER STATES' [patent_app_type] => utility [patent_app_number] => 14/140321 [patent_app_country] => US [patent_app_date] => 2013-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 17134 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140321 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/140321
Systems and techniques for control of storage device power states Dec 23, 2013 Issued
Array ( [id] => 10210690 [patent_doc_number] => 20150095682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'TECHNIQUES FOR TRACING WAKELOCK USAGE' [patent_app_type] => utility [patent_app_number] => 14/129920 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 16110 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14129920 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/129920
Techniques for tracing wakelock usage Sep 26, 2013 Issued
Array ( [id] => 9225010 [patent_doc_number] => 20140019785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'ELECTRIC DEVICE, AND METHOD AND COMPUTER PROGRAM PRODUCT FOR CONTROLLING POWER SUPPLY IN ELECTRIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/033023 [patent_app_country] => US [patent_app_date] => 2013-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8978 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14033023 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/033023
ELECTRIC DEVICE, AND METHOD AND COMPUTER PROGRAM PRODUCT FOR CONTROLLING POWER SUPPLY IN ELECTRIC DEVICE Sep 19, 2013 Abandoned
Array ( [id] => 10568914 [patent_doc_number] => 09292080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Selective blocking of background activity' [patent_app_type] => utility [patent_app_number] => 13/922104 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8233 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922104 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922104
Selective blocking of background activity Jun 18, 2013 Issued
Array ( [id] => 12167306 [patent_doc_number] => 09886072 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-06 [patent_title] => 'Network processor FPGA (npFPGA): multi-die FPGA chip for scalable multi-gigabit network processing' [patent_app_type] => utility [patent_app_number] => 13/921364 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8260 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921364 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921364
Network processor FPGA (npFPGA): multi-die FPGA chip for scalable multi-gigabit network processing Jun 18, 2013 Issued
Array ( [id] => 10977034 [patent_doc_number] => 20140380068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'SRAM Regulating Retention Scheme with Discrete Switch Control and Instant Reference Voltage Generation' [patent_app_type] => utility [patent_app_number] => 13/921475 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921475 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921475
SRAM regulating retention scheme with discrete switch control and instant reference voltage generation Jun 18, 2013 Issued
Array ( [id] => 9548668 [patent_doc_number] => 20140173316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'COMPUTER MAINBOARD' [patent_app_type] => utility [patent_app_number] => 13/921216 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 538 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921216 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921216
COMPUTER MAINBOARD Jun 18, 2013 Abandoned
Array ( [id] => 11490016 [patent_doc_number] => 09596093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Communication apparatus, control method for communication apparatus, and recording medium' [patent_app_type] => utility [patent_app_number] => 13/921979 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5429 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921979 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921979
Communication apparatus, control method for communication apparatus, and recording medium Jun 18, 2013 Issued
Array ( [id] => 8952762 [patent_doc_number] => 20130198543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Apparatus and Method for TPM and LAN Power Management' [patent_app_type] => utility [patent_app_number] => 13/793207 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13793207 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/793207
Apparatus and method for TPM and LAN power management Mar 10, 2013 Issued
Array ( [id] => 10616360 [patent_doc_number] => 09335804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Distributing power to heterogeneous compute elements of a processor' [patent_app_type] => utility [patent_app_number] => 13/783986 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7725 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783986 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783986
Distributing power to heterogeneous compute elements of a processor Mar 3, 2013 Issued
Array ( [id] => 11563381 [patent_doc_number] => 09625967 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => 'Managing power reduction in data center components' [patent_app_type] => utility [patent_app_number] => 13/626182 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7191 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626182 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626182
Managing power reduction in data center components Sep 24, 2012 Issued
Array ( [id] => 11430939 [patent_doc_number] => 09569256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Method for controlling schedule of executing application in terminal device and terminal device implementing the method' [patent_app_type] => utility [patent_app_number] => 13/626111 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10504 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626111
Method for controlling schedule of executing application in terminal device and terminal device implementing the method Sep 24, 2012 Issued
Array ( [id] => 9386235 [patent_doc_number] => 20140089718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'CLOCK DOMAIN BOUNDARY CROSSING USING AN ASYNCHRONOUS BUFFER' [patent_app_type] => utility [patent_app_number] => 13/625108 [patent_app_country] => US [patent_app_date] => 2012-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13625108 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/625108
Clock domain boundary crossing using an asynchronous buffer Sep 23, 2012 Issued
Array ( [id] => 8757068 [patent_doc_number] => 20130091372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'CONTROL DEVICE AND COMPUTER PROGRAM PRODUCT' [patent_app_type] => utility [patent_app_number] => 13/622514 [patent_app_country] => US [patent_app_date] => 2012-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9790 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13622514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/622514
CONTROL DEVICE AND COMPUTER PROGRAM PRODUCT Sep 18, 2012 Abandoned
Array ( [id] => 12432912 [patent_doc_number] => 09977485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Cache array with reduced power consumption [patent_app_type] => utility [patent_app_number] => 13/622191 [patent_app_country] => US [patent_app_date] => 2012-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3597 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13622191 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/622191
Cache array with reduced power consumption Sep 17, 2012 Issued
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