Samantha Moon
Examiner (ID: 12445)
Most Active Art Unit | 3746 |
Art Unit(s) | 3746 |
Total Applications | 6 |
Issued Applications | 6 |
Pending Applications | 0 |
Abandoned Applications | 0 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4234393
[patent_doc_number] => 06011748
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-04
[patent_title] => 'Method and apparatus for built-in self test of integrated circuits providing for separate row and column addresses'
[patent_app_type] => 1
[patent_app_number] => 8/917013
[patent_app_country] => US
[patent_app_date] => 1997-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4635
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/011/06011748.pdf
[firstpage_image] =>[orig_patent_app_number] => 917013
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/917013 | Method and apparatus for built-in self test of integrated circuits providing for separate row and column addresses | Aug 20, 1997 | Issued |
Array
(
[id] => 4054657
[patent_doc_number] => 05912855
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-15
[patent_title] => 'Power up initialization circuit responding to an input signal'
[patent_app_type] => 1
[patent_app_number] => 8/915845
[patent_app_country] => US
[patent_app_date] => 1997-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6746
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/912/05912855.pdf
[firstpage_image] =>[orig_patent_app_number] => 915845
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/915845 | Power up initialization circuit responding to an input signal | Aug 20, 1997 | Issued |
Array
(
[id] => 4077681
[patent_doc_number] => 05867435
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-02
[patent_title] => 'Fault repair method for a memory device'
[patent_app_type] => 1
[patent_app_number] => 8/914212
[patent_app_country] => US
[patent_app_date] => 1997-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 2443
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/867/05867435.pdf
[firstpage_image] =>[orig_patent_app_number] => 914212
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/914212 | Fault repair method for a memory device | Aug 18, 1997 | Issued |
Array
(
[id] => 3807664
[patent_doc_number] => 05781471
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'PMOS non-volatile latch for storage of redundancy addresses'
[patent_app_type] => 1
[patent_app_number] => 8/911816
[patent_app_country] => US
[patent_app_date] => 1997-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3526
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/781/05781471.pdf
[firstpage_image] =>[orig_patent_app_number] => 911816
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/911816 | PMOS non-volatile latch for storage of redundancy addresses | Aug 14, 1997 | Issued |
Array
(
[id] => 3802645
[patent_doc_number] => 05841718
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Use of voltage equalization in signal-sensing circuits'
[patent_app_type] => 1
[patent_app_number] => 8/909014
[patent_app_country] => US
[patent_app_date] => 1997-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3690
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/841/05841718.pdf
[firstpage_image] =>[orig_patent_app_number] => 909014
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/909014 | Use of voltage equalization in signal-sensing circuits | Aug 7, 1997 | Issued |
Array
(
[id] => 4077385
[patent_doc_number] => 05867417
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-02
[patent_title] => 'Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems'
[patent_app_type] => 1
[patent_app_number] => 8/907111
[patent_app_country] => US
[patent_app_date] => 1997-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 6544
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/867/05867417.pdf
[firstpage_image] =>[orig_patent_app_number] => 907111
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/907111 | Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems | Aug 5, 1997 | Issued |
Array
(
[id] => 4025831
[patent_doc_number] => 05963478
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-05
[patent_title] => 'EEPROM and method of driving the same'
[patent_app_type] => 1
[patent_app_number] => 8/907211
[patent_app_country] => US
[patent_app_date] => 1997-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3432
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/963/05963478.pdf
[firstpage_image] =>[orig_patent_app_number] => 907211
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/907211 | EEPROM and method of driving the same | Aug 5, 1997 | Issued |
Array
(
[id] => 3915195
[patent_doc_number] => 05898615
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Semiconductor memory device having non-volatile memory cells connected in series'
[patent_app_type] => 1
[patent_app_number] => 8/905217
[patent_app_country] => US
[patent_app_date] => 1997-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5467
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/898/05898615.pdf
[firstpage_image] =>[orig_patent_app_number] => 905217
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/905217 | Semiconductor memory device having non-volatile memory cells connected in series | Jul 31, 1997 | Issued |
Array
(
[id] => 3756694
[patent_doc_number] => 05801992
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'High speed low-power consumption semiconductor non-volatile memory device'
[patent_app_type] => 1
[patent_app_number] => 8/901811
[patent_app_country] => US
[patent_app_date] => 1997-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5844
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801992.pdf
[firstpage_image] =>[orig_patent_app_number] => 901811
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/901811 | High speed low-power consumption semiconductor non-volatile memory device | Jul 27, 1997 | Issued |
Array
(
[id] => 3905354
[patent_doc_number] => 05835437
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'Semiconductor memory device having memory cell array divided into a plurality of memory blocks'
[patent_app_type] => 1
[patent_app_number] => 8/900514
[patent_app_country] => US
[patent_app_date] => 1997-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 74
[patent_no_of_words] => 10729
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/835/05835437.pdf
[firstpage_image] =>[orig_patent_app_number] => 900514
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/900514 | Semiconductor memory device having memory cell array divided into a plurality of memory blocks | Jul 24, 1997 | Issued |
Array
(
[id] => 3821070
[patent_doc_number] => 05831893
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Memory cell'
[patent_app_type] => 1
[patent_app_number] => 8/900313
[patent_app_country] => US
[patent_app_date] => 1997-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4486
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831893.pdf
[firstpage_image] =>[orig_patent_app_number] => 900313
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/900313 | Memory cell | Jul 24, 1997 | Issued |
Array
(
[id] => 4012439
[patent_doc_number] => 05986959
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-16
[patent_title] => 'Semiconductor memory device having internal voltage down-converting circuit reducing current consumption upon power ON'
[patent_app_type] => 1
[patent_app_number] => 8/899815
[patent_app_country] => US
[patent_app_date] => 1997-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 16
[patent_no_of_words] => 9186
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/986/05986959.pdf
[firstpage_image] =>[orig_patent_app_number] => 899815
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/899815 | Semiconductor memory device having internal voltage down-converting circuit reducing current consumption upon power ON | Jul 23, 1997 | Issued |
Array
(
[id] => 4045867
[patent_doc_number] => 05943273
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-24
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/899143
[patent_app_country] => US
[patent_app_date] => 1997-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 57
[patent_figures_cnt] => 103
[patent_no_of_words] => 27010
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/943/05943273.pdf
[firstpage_image] =>[orig_patent_app_number] => 899143
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/899143 | Semiconductor memory device | Jul 22, 1997 | Issued |
Array
(
[id] => 3962457
[patent_doc_number] => 05999470
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-07
[patent_title] => 'Sense amplifier circuit having high speed operation'
[patent_app_type] => 1
[patent_app_number] => 8/898113
[patent_app_country] => US
[patent_app_date] => 1997-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 6306
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 287
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/999/05999470.pdf
[firstpage_image] =>[orig_patent_app_number] => 898113
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/898113 | Sense amplifier circuit having high speed operation | Jul 21, 1997 | Issued |
Array
(
[id] => 4073468
[patent_doc_number] => 05896340
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-20
[patent_title] => 'Multiple array architecture for analog or multi-bit-cell memory'
[patent_app_type] => 1
[patent_app_number] => 8/889111
[patent_app_country] => US
[patent_app_date] => 1997-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5695
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/896/05896340.pdf
[firstpage_image] =>[orig_patent_app_number] => 889111
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/889111 | Multiple array architecture for analog or multi-bit-cell memory | Jul 6, 1997 | Issued |
Array
(
[id] => 4025919
[patent_doc_number] => 05963484
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-05
[patent_title] => 'High speed single-ended amplifier of a latched type'
[patent_app_type] => 1
[patent_app_number] => 8/885016
[patent_app_country] => US
[patent_app_date] => 1997-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2275
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/963/05963484.pdf
[firstpage_image] =>[orig_patent_app_number] => 885016
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/885016 | High speed single-ended amplifier of a latched type | Jun 29, 1997 | Issued |
Array
(
[id] => 3821320
[patent_doc_number] => 05831911
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Semiconductor memory device for reducing a static current'
[patent_app_type] => 1
[patent_app_number] => 8/883214
[patent_app_country] => US
[patent_app_date] => 1997-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 1765
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831911.pdf
[firstpage_image] =>[orig_patent_app_number] => 883214
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/883214 | Semiconductor memory device for reducing a static current | Jun 25, 1997 | Issued |
Array
(
[id] => 3826187
[patent_doc_number] => 05771197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Sense amplifier of semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/882310
[patent_app_country] => US
[patent_app_date] => 1997-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4294
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/771/05771197.pdf
[firstpage_image] =>[orig_patent_app_number] => 882310
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/882310 | Sense amplifier of semiconductor memory device | Jun 24, 1997 | Issued |
Array
(
[id] => 3993861
[patent_doc_number] => 05862085
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-19
[patent_title] => 'Apparatus and method for differential comparison of digital words'
[patent_app_type] => 1
[patent_app_number] => 8/882510
[patent_app_country] => US
[patent_app_date] => 1997-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3829
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/862/05862085.pdf
[firstpage_image] =>[orig_patent_app_number] => 882510
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/882510 | Apparatus and method for differential comparison of digital words | Jun 24, 1997 | Issued |
Array
(
[id] => 3900799
[patent_doc_number] => 05777930
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Test potential transfer circuit'
[patent_app_type] => 1
[patent_app_number] => 8/881870
[patent_app_country] => US
[patent_app_date] => 1997-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3827
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/777/05777930.pdf
[firstpage_image] =>[orig_patent_app_number] => 881870
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/881870 | Test potential transfer circuit | Jun 23, 1997 | Issued |