Samantha Moon

Array ( [id] => 3873347 [patent_doc_number] => 05796663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Address signal storage circuit of data repair controller' [patent_app_type] => 1 [patent_app_number] => 8/764444 [patent_app_country] => US [patent_app_date] => 1996-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6721 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796663.pdf [firstpage_image] =>[orig_patent_app_number] => 764444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3630978 [patent_doc_number] => 05689456 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Semiconductor non-volatile ferroelectric memory transistor accompanied with capacitor for increasing potential difference applied to ferroelectric layer' [patent_app_type] => 1 [patent_app_number] => 8/745848 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4341 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689456.pdf [firstpage_image] =>[orig_patent_app_number] => 745848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3752259 [patent_doc_number] => 05787047 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Memory architecture for burst mode access' [patent_app_type] => 1 [patent_app_number] => 8/745876 [patent_app_country] => US [patent_app_date] => 1996-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6735 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787047.pdf [firstpage_image] =>[orig_patent_app_number] => 745876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3873812 [patent_doc_number] => 05793682 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Circuit and method for disabling a bitline load' [patent_app_type] => 1 [patent_app_number] => 8/742449 [patent_app_country] => US [patent_app_date] => 1996-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2549 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793682.pdf [firstpage_image] =>[orig_patent_app_number] => 742449 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3843734 [patent_doc_number] => 05740105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Memory cell array with LOCOS free isolation' [patent_app_type] => 1 [patent_app_number] => 8/731649 [patent_app_country] => US [patent_app_date] => 1996-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3009 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740105.pdf [firstpage_image] =>[orig_patent_app_number] => 731649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3843734 [patent_doc_number] => 05740105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Memory cell array with LOCOS free isolation' [patent_app_type] => 1 [patent_app_number] => 8/731649 [patent_app_country] => US [patent_app_date] => 1996-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3009 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740105.pdf [firstpage_image] =>[orig_patent_app_number] => 731649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3998280 [patent_doc_number] => 05959901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Static semiconductor memory of flip-flop circuit type with driving N-channel transistors' [patent_app_type] => 1 [patent_app_number] => 8/732147 [patent_app_country] => US [patent_app_date] => 1996-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4391 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959901.pdf [firstpage_image] =>[orig_patent_app_number] => 732147 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3843957 [patent_doc_number] => 05740121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Synchronous-type memory' [patent_app_type] => 1 [patent_app_number] => 8/730211 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5591 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740121.pdf [firstpage_image] =>[orig_patent_app_number] => 730211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3733496 [patent_doc_number] => 05701272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Negative voltage switching circuit' [patent_app_type] => 1 [patent_app_number] => 8/723666 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5990 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701272.pdf [firstpage_image] =>[orig_patent_app_number] => 723666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3809131 [patent_doc_number] => 05828596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/723949 [patent_app_country] => US [patent_app_date] => 1996-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5434 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828596.pdf [firstpage_image] =>[orig_patent_app_number] => 723949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3836204 [patent_doc_number] => 05732032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Semiconductor memory device having a burn-in control circuit and burn-in test method thereof' [patent_app_type] => 1 [patent_app_number] => 8/715549 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1675 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732032.pdf [firstpage_image] =>[orig_patent_app_number] => 715549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3891727 [patent_doc_number] => 05798965 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Dynamic random access memory having no capacitor and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/708743 [patent_app_country] => US [patent_app_date] => 1996-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 6404 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798965.pdf [firstpage_image] =>[orig_patent_app_number] => 708743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3854013 [patent_doc_number] => 05745425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Reliable backup memory' [patent_app_type] => 1 [patent_app_number] => 8/703143 [patent_app_country] => US [patent_app_date] => 1996-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3602 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745425.pdf [firstpage_image] =>[orig_patent_app_number] => 703143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3664407 [patent_doc_number] => 05623438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Virtual ground read only memory circuit' [patent_app_type] => 1 [patent_app_number] => 8/697482 [patent_app_country] => US [patent_app_date] => 1996-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4159 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623438.pdf [firstpage_image] =>[orig_patent_app_number] => 697482 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3712822 [patent_doc_number] => 05675533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/697395 [patent_app_country] => US [patent_app_date] => 1996-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 6453 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675533.pdf [firstpage_image] =>[orig_patent_app_number] => 697395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3993876 [patent_doc_number] => 05862086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'Semiconductor storage device' [patent_app_type] => 1 [patent_app_number] => 8/701348 [patent_app_country] => US [patent_app_date] => 1996-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 11252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/862/05862086.pdf [firstpage_image] =>[orig_patent_app_number] => 701348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3890174 [patent_doc_number] => 05729496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Nonvolatile semiconductor memory element and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/698247 [patent_app_country] => US [patent_app_date] => 1996-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2280 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729496.pdf [firstpage_image] =>[orig_patent_app_number] => 698247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3793065 [patent_doc_number] => 05821909 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Fast flash EPROM programming and pre-programming circuit design' [patent_app_type] => 1 [patent_app_number] => 8/700587 [patent_app_country] => US [patent_app_date] => 1996-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6591 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821909.pdf [firstpage_image] =>[orig_patent_app_number] => 700587 [rel_patent_id] =>[rel_patent_doc_number] =>)