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Stephanie Chung Kim

Examiner (ID: 15651)

Most Active Art Unit
3781
Art Unit(s)
3781
Total Applications
1
Issued Applications
1
Pending Applications
0
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10502670 [patent_doc_number] => 09231074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Bipolar junction transistors with an air gap in the shallow trench isolation' [patent_app_type] => utility [patent_app_number] => 13/946379 [patent_app_country] => US [patent_app_date] => 2013-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6202 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13946379 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/946379
Bipolar junction transistors with an air gap in the shallow trench isolation Jul 18, 2013 Issued
Array ( [id] => 9965429 [patent_doc_number] => 09013046 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-21 [patent_title] => 'Protecting integrated circuits from excessive charge accumulation during plasma cleaning of multichip modules' [patent_app_type] => utility [patent_app_number] => 13/945074 [patent_app_country] => US [patent_app_date] => 2013-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13945074 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/945074
Protecting integrated circuits from excessive charge accumulation during plasma cleaning of multichip modules Jul 17, 2013 Issued
Array ( [id] => 9534540 [patent_doc_number] => 20140159187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'ANTIREFLECTION SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/761158 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2654 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761158 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761158
Antireflection substrate structure and manufacturing method thereof Feb 6, 2013 Issued
Array ( [id] => 10485090 [patent_doc_number] => 20150370109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/126941 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4807 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14126941 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/126941
Array substrate and fabrication method thereof and display device Dec 20, 2012 Issued
Array ( [id] => 11911447 [patent_doc_number] => 09780271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Method for producing optoelectronic semiconductor components, arrangement and optoelectronic semiconductor component' [patent_app_type] => utility [patent_app_number] => 14/346673 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5259 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14346673 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/346673
Method for producing optoelectronic semiconductor components, arrangement and optoelectronic semiconductor component Dec 10, 2012 Issued
Array ( [id] => 10645323 [patent_doc_number] => 09362197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Molded underfilling for package on package devices' [patent_app_type] => utility [patent_app_number] => 13/667060 [patent_app_country] => US [patent_app_date] => 2012-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4354 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13667060 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/667060
Molded underfilling for package on package devices Nov 1, 2012 Issued
Array ( [id] => 9334786 [patent_doc_number] => 20140061568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'RESISTIVE MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/599865 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7696 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599865 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/599865
Resistive memory devices Aug 29, 2012 Issued
Array ( [id] => 8999286 [patent_doc_number] => 20130220410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'Precursors for Photovoltaic Passivation' [patent_app_type] => utility [patent_app_number] => 13/595419 [patent_app_country] => US [patent_app_date] => 2012-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13595419 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/595419
Precursors for Photovoltaic Passivation Aug 26, 2012 Abandoned
Array ( [id] => 8680693 [patent_doc_number] => 20130048977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/592870 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 18231 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592870 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/592870
Semiconductor device and manufacturing method thereof Aug 22, 2012 Issued
Array ( [id] => 10544612 [patent_doc_number] => 09269747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Self-aligned interconnection for integrated circuits' [patent_app_type] => utility [patent_app_number] => 13/593065 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9254 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13593065 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/593065
Self-aligned interconnection for integrated circuits Aug 22, 2012 Issued
Array ( [id] => 9327885 [patent_doc_number] => 20140054667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'Split-Gate Memory Cell With Depletion-Mode Floating Gate Channel, And Method Of Making Same' [patent_app_type] => utility [patent_app_number] => 13/593460 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13593460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/593460
Split-gate memory cell with depletion-mode floating gate channel, and method of making same Aug 22, 2012 Issued
Array ( [id] => 9292301 [patent_doc_number] => 20140035935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'PASSIVES VIA BAR' [patent_app_type] => utility [patent_app_number] => 13/566925 [patent_app_country] => US [patent_app_date] => 2012-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12236 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13566925 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/566925
PASSIVES VIA BAR Aug 2, 2012 Abandoned
Array ( [id] => 9202455 [patent_doc_number] => 20140001633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'COPPER INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THEREOF' [patent_app_type] => utility [patent_app_number] => 13/535217 [patent_app_country] => US [patent_app_date] => 2012-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2838 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535217 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535217
COPPER INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THEREOF Jun 26, 2012 Abandoned
Array ( [id] => 11279841 [patent_doc_number] => 09496325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Substrate resistor and method of making same' [patent_app_type] => utility [patent_app_number] => 13/533543 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533543 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/533543
Substrate resistor and method of making same Jun 25, 2012 Issued
Array ( [id] => 8519159 [patent_doc_number] => 20120318567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'WIRING STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/495216 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10200 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495216 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495216
WIRING STRUCTURES Jun 12, 2012 Abandoned
Array ( [id] => 9198293 [patent_doc_number] => 20130337608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'SEMICONDUCTOR DEVICE, AND PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/003404 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 15247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14003404 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/003404
SEMICONDUCTOR DEVICE, AND PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE Mar 8, 2012 Abandoned
Array ( [id] => 9179049 [patent_doc_number] => 20130321034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'POWER ELECTRONIC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/882621 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12465 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13882621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/882621
Power electronic devices Oct 25, 2011 Issued
Array ( [id] => 8695775 [patent_doc_number] => 20130057784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'ELECTRONIC DEVICE, DISPLAY DEVICE, AND TELEVISION RECEIVER' [patent_app_type] => utility [patent_app_number] => 13/698306 [patent_app_country] => US [patent_app_date] => 2011-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13207 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13698306 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/698306
Electronic device, display device, and television receiver May 29, 2011 Issued
Array ( [id] => 6165933 [patent_doc_number] => 20110195543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'FLIP-CHIP ASSEMBLY WITH ORGANIC CHIP CARRIER HAVING MUSHROOM-PLATED SOLDER RESIST OPENING' [patent_app_type] => utility [patent_app_number] => 13/091317 [patent_app_country] => US [patent_app_date] => 2011-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5073 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20110195543.pdf [firstpage_image] =>[orig_patent_app_number] => 13091317 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/091317
FLIP-CHIP ASSEMBLY WITH ORGANIC CHIP CARRIER HAVING MUSHROOM-PLATED SOLDER RESIST OPENING Apr 20, 2011 Abandoned
Array ( [id] => 10172050 [patent_doc_number] => 09202762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing' [patent_app_type] => utility [patent_app_number] => 12/986130 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 6353 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12986130 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986130
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing Jan 5, 2011 Issued
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