Method for forming semiconductor device that includes covering metal gate with multilayer dielectric | Patent Publication Number 20210327760

US 20210327760 A1
Patent NumberUS 11164789 B1
Application Number16852191
Filled DateApr 17, 2020
Priority DateApr 17, 2020
Publication DateOct 21, 2021
Inventor/ApplicantsYu-Shih Wang
Tze-Liang LEE
Tze-Liang Lee
Tsai-Jung HO
Yu-Shih WANG
Tsai-Jung Ho
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