Hyochang Kim > Papers

Paper Listing

Journal:
1. H. KimH. Kim3834,, Duty-cycle and phase spacing error correction circuit for high-speed serial link. "IEICE Electronics Express": Jun 2017; 12: 1-7.
2. H. KimH. Kim3834, A 3.4-Gbps clock and data recovery circuit with a forwarded clock in a 0.13-μm CMOS technology. "International Journal of Electronics Letters ": Jul 2013; 2: 77-86.
3. H. KimH. Kim3834, Duty-cycle and phase spacing error correction circuit for high-speed serial link. "IEICE Electronics Express": 2017; 12: 12.
4. H. KimH. Kim3834, A 6-Gb/s Wireline Receiver With Intrapair Skew Compensation and Three-Tap Decision-Feedback Equalizer in 28-nm CMOS. "IEEE Transactions on Very Large Scale Integration (VLSI) Systems": Feb2020;
5. H. KimH. Kim3834, A 12-Gb/s HDMI 2.1 quarter-rate transmitter in 28-nm bulk CMOS process. "Analog Integrated Circuits and Signal Processing": Jun 2018;
Conference:
1. H. KimH. Kim3834, A HDMI-to-MHL video format conversion system-on-chip (SoC) for mobile handset in a 130-nm CMOS technology. "IEEE International Conference on Consumer Electronics (ICCE)": Jan 2016; 1: 1-2.