CONTEST
Competed
$4,500
This contest is closed.
Problem
Patexia is looking for descriptions for fabricating two semiconductor layers and mounting them on top of each other so that vias passing through the top layer can be used to electrically connect the top surfaces of each layer.
Submitted documents describing this system must be:
- filed or published before 03/25/1999
- not on the known references list
The entire submission must describe a wiring method with the following steps:
- creating the top semiconductor layer with a base substrate, a layer with circuits, and metalizing surfaces on top of everything, and opening vias that go through the circuit layer
- creating a bottom semiconductor layer with the same composition, except the vias
- mounting the two layers together so that the bottom of the top layer touches the top of the bottom layer
- creating an electrically conductive connection between metalizing surfaces on the top with those on the bottom layer through the holes in the top layer
Figure. Diagram showing how the two layers are mounted together
This contest is for a prior art search for US Patent 6,448,174, with a focus on claim 1.
Questions
| # | Question | Value |
|---|---|---|
| 1 | Is the reference either a US patent filed, a foreign patent published, or a non-patent document published before March 25th, 1999? | T/F |
| 2 | Does the reference show two semiconductor layers mounted on top of each other are wired together by aligning vias in the top layer to match metal surfaces on the bottom layer? | 50 |
| 3 | Does the reference further show that both the top and bottom semiconductor layers are made with (a) a base substrate, (b) a layer with circuits, and (c) metalizing surfaces on top of everything? | 10 |
| 4 | (3a) Does the reference further show that the top layer has vias next to the (c) metalizing surfaces that they go through the (b) layer with circuits? | 25 |
| 5 | Does the reference show that the bottom surface of the top layer is mounted onto the top surface of the bottom layer? | 5 |
| 6 | Does the reference show that the wiring is finished by creating an electrical connection through the vias from the metalizing surfaces on the top layer to those on the bottom layer? | 10 |
Additional Notes
This is a Prior Art Search contest aimed at determining if a patent idea was known and publicly available before a patent was filed.
+5 bonus points will be awarded for non-patent literature and for foreign language references.
This contest will close on Sunday, July 12th, 2015 at 11:59 PM PST.
Please review the Contest Rules. For more information on how to submit to this Contest type, please read the Intro to Prior Art Search page.
