Patexia seeks prior art for US Patent 6,504,764 (US ‘764), which allegedly describes a nonvolatile memory system (e.g., flash memory) with a buffer memory component and a controller, which verifies the data after each write operation and repeats the write operation if the verification fails.

Questions

1. Was the reference filed or published before February 16, 1998? (True/False)
2. Does the reference describe a memory system which includes a nonvolatile memory, a buffer memory, and a controller? (30 points)
3. Is the controller capable of sending commands to the nonvolatile memory, which trigger the writing of data stored in the buffer memory to the nonvolatile memory? (30 points)
4. When the steps described in Question 3 have been performed, is there a process which verifies that the data in the buffer was in fact written to the nonvolatile memory, and which repeats the write process if this verification fails? (40 points)