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Patent Known References
| Type | Patent Country | Patent Number |
|---|---|---|
| Patent | US | 4858105 |
| Patent | US | 4947366 |
| Patent | US | 5019968 |
| Patent | US | 5050068 |
| Patent | US | 5050668 |
| Patent | US | 5193167 |
| Patent | US | 5202967 |
| Patent | US | 5233694 |
| Patent | US | 5241633 |
| Patent | US | 5317740 |
| Patent | US | 5394529 |
| Patent | EP | 368332 |
| Patent | EP | 427025 |
| Patent | EP | 427245 |
Published Known References
| Type | Title of NPL |
|---|---|
| Journal | Cache Organization to Maximize Fetch Bandwidth IBM Technical Disclosure Bulletin vol. 32 No. 2 Jul. 1989 pp. 62-64. |
| Journal | I860 Microprocessor Internal Architecture Microprocessors and Microsystems vol. 14 No. 12 Mar. 1990 pp. 89-96. |
| Conference | Kohn et al. Session 3: Floating Point Processors WAM 3.6: A 1000000 Transistor Microprocessor ISSC 89 Wednesday Feb. 15 1989 pp. 53-55. |
| Book | M68000 16/32-Bit Microprocessor Programmer's Reference Manual 1984 pp. 72 77 and 80. |
| Book | Osborn et al. Osborne 16-Bit Microprocessor Handbook Includes 2900 Chip Slice Family Osborne/McGraw-Hill 1981 pp. 1-1 to 1-5; 1-24 to 1-33; 4-1 to 4-4; and 4-35 to 4-45. |
| Book | Osborne 16-bit Microprocessor Handbook 1981 pp. 7-30 to 7-38. |
| Book | Tabak D. RISC Systems 1990 pp. 49-71. |
