Search

A Michael Chambers

Examiner (ID: 17983)

Most Active Art Unit
3407
Art Unit(s)
3401, 2899, 3727, 2103, 3753, 3407
Total Applications
3455
Issued Applications
3109
Pending Applications
98
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16433479 [patent_doc_number] => 10833582 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => Methods and systems of power management for an integrated circuit [patent_app_type] => utility [patent_app_number] => 16/806429 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6287 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806429 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806429
Methods and systems of power management for an integrated circuit Mar 1, 2020 Issued
Array ( [id] => 16339849 [patent_doc_number] => 10790821 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-29 [patent_title] => Power switch circuit capable of reducing leakage currents [patent_app_type] => utility [patent_app_number] => 16/802566 [patent_app_country] => US [patent_app_date] => 2020-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2784 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16802566 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/802566
Power switch circuit capable of reducing leakage currents Feb 26, 2020 Issued
Array ( [id] => 16700580 [patent_doc_number] => 10951200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Clock circuit and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/800981 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800981 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/800981
Clock circuit and method of operating the same Feb 24, 2020 Issued
Array ( [id] => 16273044 [patent_doc_number] => 20200274532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => POWER-ON CLEAR CIRCUIT AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/799117 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799117 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/799117
Power-on clear circuit and semiconductor device Feb 23, 2020 Issued
Array ( [id] => 16774669 [patent_doc_number] => 10985795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Switch arrangement [patent_app_type] => utility [patent_app_number] => 16/794846 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 12460 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 500 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794846 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794846
Switch arrangement Feb 18, 2020 Issued
Array ( [id] => 16387212 [patent_doc_number] => 10812064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Source down power FET with integrated temperature sensor [patent_app_type] => utility [patent_app_number] => 16/794275 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 7719 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794275 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794275
Source down power FET with integrated temperature sensor Feb 18, 2020 Issued
Array ( [id] => 16022619 [patent_doc_number] => 20200186153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => SIGNAL SOURCE [patent_app_type] => utility [patent_app_number] => 16/793318 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16793318 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/793318
SIGNAL SOURCE Feb 17, 2020 Abandoned
Array ( [id] => 16022237 [patent_doc_number] => 20200185962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => POWER TRANSMITTING APPARATUS, POWER RECEIVING APPARATUS, CONTROL METHODS THEREFOF, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 16/790204 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16790204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/790204
Power transmitting apparatus, power receiving apparatus, control methods thereof, and program Feb 12, 2020 Issued
Array ( [id] => 16373135 [patent_doc_number] => 10804909 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-13 [patent_title] => Locking detecting circuit and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/783999 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783999
Locking detecting circuit and operating method thereof Feb 5, 2020 Issued
Array ( [id] => 16324893 [patent_doc_number] => 10784874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-22 [patent_title] => All-digital voltage monitor (ADVM) with single-cycle latency [patent_app_type] => utility [patent_app_number] => 16/783096 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783096 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783096
All-digital voltage monitor (ADVM) with single-cycle latency Feb 4, 2020 Issued
Array ( [id] => 16002611 [patent_doc_number] => 20200177176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => CURRENT CONTROLLED AMPLIFIER [patent_app_type] => utility [patent_app_number] => 16/781097 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16781097 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/781097
Current controlled amplifier Feb 3, 2020 Issued
Array ( [id] => 16537272 [patent_doc_number] => 10879893 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Passive detection of device decoupling [patent_app_type] => utility [patent_app_number] => 16/779055 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16779055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/779055
Passive detection of device decoupling Jan 30, 2020 Issued
Array ( [id] => 16257431 [patent_doc_number] => 20200266806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => FRACTIONAL FREQUENCY DIVIDER AND FREQUENCY SYNTHESIZER [patent_app_type] => utility [patent_app_number] => 16/775675 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775675
Fractional frequency divider and frequency synthesizer Jan 28, 2020 Issued
Array ( [id] => 16280737 [patent_doc_number] => 10763782 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-01 [patent_title] => Tunable inductors [patent_app_type] => utility [patent_app_number] => 16/775384 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775384 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775384
Tunable inductors Jan 28, 2020 Issued
Array ( [id] => 16480316 [patent_doc_number] => 10855277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Mitigating reliability issues in a low-voltage reference buffer driven by a high-voltage circuit [patent_app_type] => utility [patent_app_number] => 16/773645 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4306 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16773645 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/773645
Mitigating reliability issues in a low-voltage reference buffer driven by a high-voltage circuit Jan 26, 2020 Issued
Array ( [id] => 16820456 [patent_doc_number] => 11005301 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-11 [patent_title] => System and method for encrypted resonant inductive power transfer [patent_app_type] => utility [patent_app_number] => 16/739160 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8361 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16739160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/739160
System and method for encrypted resonant inductive power transfer Jan 9, 2020 Issued
Array ( [id] => 16280744 [patent_doc_number] => 10763789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Mixer for reducing local frequency signal generated at output of the mixer [patent_app_type] => utility [patent_app_number] => 16/740317 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740317 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740317
Mixer for reducing local frequency signal generated at output of the mixer Jan 9, 2020 Issued
Array ( [id] => 16643993 [patent_doc_number] => 10921847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Clock generator for adjusting jitter characteristics and operation power, semiconductor device including the clock generator, and operating method of the clock generator [patent_app_type] => utility [patent_app_number] => 16/724754 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 13090 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724754 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724754
Clock generator for adjusting jitter characteristics and operation power, semiconductor device including the clock generator, and operating method of the clock generator Dec 22, 2019 Issued
Array ( [id] => 16637320 [patent_doc_number] => 10915831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Reduction and/or mitigation of crosstalk in quantum bit gates [patent_app_type] => utility [patent_app_number] => 16/719123 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11426 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719123
Reduction and/or mitigation of crosstalk in quantum bit gates Dec 17, 2019 Issued
Array ( [id] => 16022549 [patent_doc_number] => 20200186118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => Attenuator De-Qing Loss Improvement and Phase Balance [patent_app_type] => utility [patent_app_number] => 16/703525 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703525 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703525
Attenuator De-Qing Loss Improvement and Phase Balance Dec 3, 2019 Abandoned
Menu