Search

A Michael Chambers

Examiner (ID: 17983)

Most Active Art Unit
3407
Art Unit(s)
3401, 2899, 3727, 2103, 3753, 3407
Total Applications
3455
Issued Applications
3109
Pending Applications
98
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14286721 [patent_doc_number] => 20190140645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => LEVEL SHIFTING CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 16/241766 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241766 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/241766
Level shifting circuit and method Jan 6, 2019 Issued
Array ( [id] => 14352103 [patent_doc_number] => 20190158024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => CRYSTAL OSCILLATOR INTERCONNECT ARCHITECTURE WITH NOISE IMMUNITY [patent_app_type] => utility [patent_app_number] => 16/237093 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237093 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/237093
Crystal oscillator interconnect architecture with noise immunity Dec 30, 2018 Issued
Array ( [id] => 15565985 [patent_doc_number] => 20200067404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => CROSS-COUPLED CHARGE-PUMPS [patent_app_type] => utility [patent_app_number] => 16/225605 [patent_app_country] => US [patent_app_date] => 2018-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16225605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/225605
Cross-coupled charge-pumps Dec 18, 2018 Issued
Array ( [id] => 14164735 [patent_doc_number] => 20190109470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => BATTERY PACK SYSTEM [patent_app_type] => utility [patent_app_number] => 16/216510 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216510
Battery pack system Dec 10, 2018 Issued
Array ( [id] => 15316931 [patent_doc_number] => 10523186 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-31 [patent_title] => Vulnerability determination in circuits [patent_app_type] => utility [patent_app_number] => 16/206234 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 9555 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206234
Vulnerability determination in circuits Nov 29, 2018 Issued
Array ( [id] => 15548835 [patent_doc_number] => 10574213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Clock circuit and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/207064 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13608 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16207064 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/207064
Clock circuit and method of operating the same Nov 29, 2018 Issued
Array ( [id] => 14855943 [patent_doc_number] => 10416693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-17 [patent_title] => Internal voltage generation circuits [patent_app_type] => utility [patent_app_number] => 16/206411 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206411 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206411
Internal voltage generation circuits Nov 29, 2018 Issued
Array ( [id] => 15235639 [patent_doc_number] => 10505553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-10 [patent_title] => Detecting the health of a phase loop lock [patent_app_type] => utility [patent_app_number] => 16/204501 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16204501 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/204501
Detecting the health of a phase loop lock Nov 28, 2018 Issued
Array ( [id] => 15612357 [patent_doc_number] => 10587253 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-10 [patent_title] => Ring oscillator-based programmable delay line [patent_app_type] => utility [patent_app_number] => 16/205093 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 11456 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16205093 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/205093
Ring oscillator-based programmable delay line Nov 28, 2018 Issued
Array ( [id] => 14383755 [patent_doc_number] => 20190165790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => FREQUENCY DIVIDER AND A TRANSCEIVER INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/202172 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202172
Frequency divider and a transceiver including the same Nov 27, 2018 Issued
Array ( [id] => 15061017 [patent_doc_number] => 10460820 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-29 [patent_title] => High-speed track-and-hold device using RF linearization technique [patent_app_type] => utility [patent_app_number] => 16/202452 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3007 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202452 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202452
High-speed track-and-hold device using RF linearization technique Nov 27, 2018 Issued
Array ( [id] => 14708545 [patent_doc_number] => 10382042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Assembly of integrated circuit modules and method for identifying the modules [patent_app_type] => utility [patent_app_number] => 16/203402 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9601 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203402
Assembly of integrated circuit modules and method for identifying the modules Nov 27, 2018 Issued
Array ( [id] => 15316991 [patent_doc_number] => 10523216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Receiving circuit, semiconductor apparatus including the receiving circuit and semiconductor system using the receiving circuit [patent_app_type] => utility [patent_app_number] => 16/201315 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7845 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201315 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201315
Receiving circuit, semiconductor apparatus including the receiving circuit and semiconductor system using the receiving circuit Nov 26, 2018 Issued
Array ( [id] => 15110311 [patent_doc_number] => 10476492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Structures and operations of integrated circuits having network of configurable switches [patent_app_type] => utility [patent_app_number] => 16/201915 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10419 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201915 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201915
Structures and operations of integrated circuits having network of configurable switches Nov 26, 2018 Issued
Array ( [id] => 15923541 [patent_doc_number] => 10659023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Apparatus and method for multiplying frequency [patent_app_type] => utility [patent_app_number] => 16/199061 [patent_app_country] => US [patent_app_date] => 2018-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4638 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199061 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199061
Apparatus and method for multiplying frequency Nov 22, 2018 Issued
Array ( [id] => 15062797 [patent_doc_number] => 10461715 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-29 [patent_title] => Mitigating power noise using a current supply [patent_app_type] => utility [patent_app_number] => 16/196080 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16196080 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/196080
Mitigating power noise using a current supply Nov 19, 2018 Issued
Array ( [id] => 14921695 [patent_doc_number] => 10432182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Semiconductor integrated circuit [patent_app_type] => utility [patent_app_number] => 16/194649 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6164 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194649 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194649
Semiconductor integrated circuit Nov 18, 2018 Issued
Array ( [id] => 15377249 [patent_doc_number] => 10530357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-07 [patent_title] => Dynamic impedance circuit for uniform voltage distribution in a high power switch branch [patent_app_type] => utility [patent_app_number] => 16/188131 [patent_app_country] => US [patent_app_date] => 2018-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5288 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16188131 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/188131
Dynamic impedance circuit for uniform voltage distribution in a high power switch branch Nov 11, 2018 Issued
Array ( [id] => 13937467 [patent_doc_number] => 20190052249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => SEMICONDUCTOR CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/164329 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164329 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/164329
Semiconductor circuit Oct 17, 2018 Issued
Array ( [id] => 15062641 [patent_doc_number] => 10461636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Voltage multiplier circuit with a common bulk and configured for positive and negative voltage generation [patent_app_type] => utility [patent_app_number] => 16/162668 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5046 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/162668
Voltage multiplier circuit with a common bulk and configured for positive and negative voltage generation Oct 16, 2018 Issued
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