Search

Aaron A. Dehne

Examiner (ID: 12461, Phone: (571)270-7880 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
4116, 2829
Total Applications
304
Issued Applications
225
Pending Applications
0
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11524452 [patent_doc_number] => 09607863 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Integrated circuit package with vacant cavity' [patent_app_type] => utility [patent_app_number] => 13/963948 [patent_app_country] => US [patent_app_date] => 2013-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3843 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13963948 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/963948
Integrated circuit package with vacant cavity Aug 8, 2013 Issued
Array ( [id] => 10151982 [patent_doc_number] => 09184282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Ultra-high voltage laterally-diffused MOS devices and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 13/963658 [patent_app_country] => US [patent_app_date] => 2013-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13963658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/963658
Ultra-high voltage laterally-diffused MOS devices and methods of forming the same Aug 8, 2013 Issued
Array ( [id] => 9542353 [patent_doc_number] => 20140167000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'ORGANIC LIGHT EMITTING DISPLAY DEVICES AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/964021 [patent_app_country] => US [patent_app_date] => 2013-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8836 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13964021 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/964021
Organic light emitting display devices and methods of fabricating the same Aug 8, 2013 Issued
Array ( [id] => 10148811 [patent_doc_number] => 09181081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Electrical component and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/962892 [patent_app_country] => US [patent_app_date] => 2013-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5021 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13962892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/962892
Electrical component and method of manufacturing the same Aug 7, 2013 Issued
Array ( [id] => 11765058 [patent_doc_number] => 09373504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-21 [patent_title] => 'Method for forming an epitactic silicon layer' [patent_app_type] => utility [patent_app_number] => 14/403915 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 5525 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14403915 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/403915
Method for forming an epitactic silicon layer May 21, 2013 Issued
Array ( [id] => 8940029 [patent_doc_number] => 20130189826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'Reduced Corner Leakage in SOI Structure and Method' [patent_app_type] => utility [patent_app_number] => 13/796154 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4722 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13796154 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/796154
Reduced corner leakage in SOI structure and method Mar 11, 2013 Issued
Array ( [id] => 8904243 [patent_doc_number] => 20130171746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'MULTI-ZONE TEMPERATURE CONTROL FOR SEMICONDUCTOR WAFER' [patent_app_type] => utility [patent_app_number] => 13/777212 [patent_app_country] => US [patent_app_date] => 2013-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6724 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/777212
Multi-zone temperature control for semiconductor wafer Feb 25, 2013 Issued
Array ( [id] => 9561342 [patent_doc_number] => 20140179056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'LASER-ABSORBING SEED LAYER FOR SOLAR CELL CONDUCTIVE CONTACT' [patent_app_type] => utility [patent_app_number] => 13/724152 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5376 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724152 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724152
LASER-ABSORBING SEED LAYER FOR SOLAR CELL CONDUCTIVE CONTACT Dec 20, 2012 Abandoned
Array ( [id] => 10583978 [patent_doc_number] => 09306106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Monolithic integration of heterojunction solar cells' [patent_app_type] => utility [patent_app_number] => 13/718819 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7541 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718819 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/718819
Monolithic integration of heterojunction solar cells Dec 17, 2012 Issued
Array ( [id] => 10010686 [patent_doc_number] => 09054215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Patterning of vertical nanowire transistor channel and gate with directed self assembly' [patent_app_type] => utility [patent_app_number] => 13/719113 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 44 [patent_no_of_words] => 6344 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/719113
Patterning of vertical nanowire transistor channel and gate with directed self assembly Dec 17, 2012 Issued
Array ( [id] => 9546158 [patent_doc_number] => 20140170806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'TCOs for High-Efficiency Crystalline Si Heterojunction Solar Cells' [patent_app_type] => utility [patent_app_number] => 13/719105 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6202 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719105 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/719105
TCOs for High-Efficiency Crystalline Si Heterojunction Solar Cells Dec 17, 2012 Abandoned
Array ( [id] => 8914041 [patent_doc_number] => 20130175666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING CAPACITOR INTEGRATED THEREIN' [patent_app_type] => utility [patent_app_number] => 13/714544 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714544 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714544
Semiconductor device having capacitor integrated therein Dec 13, 2012 Issued
Array ( [id] => 9542556 [patent_doc_number] => 20140167202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'ELECTROSTATIC DISCHARGE RESISTANT DIODES' [patent_app_type] => utility [patent_app_number] => 13/714404 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2246 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714404 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714404
Electrostatic discharge resistant diodes Dec 13, 2012 Issued
Array ( [id] => 10876885 [patent_doc_number] => 08901675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'CMOS devices and fabrication method' [patent_app_type] => utility [patent_app_number] => 13/714452 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714452 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714452
CMOS devices and fabrication method Dec 13, 2012 Issued
Array ( [id] => 8866092 [patent_doc_number] => 20130149795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'ETCHING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/713388 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3398 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13713388 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/713388
ETCHING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Dec 12, 2012 Abandoned
Array ( [id] => 8866140 [patent_doc_number] => 20130149842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'LAMINATED SHEET AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE LAMINATED SHEET' [patent_app_type] => utility [patent_app_number] => 13/712707 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 20418 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712707 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712707
Laminated sheet and method of manufacturing semiconductor device using the laminated sheet Dec 11, 2012 Issued
Array ( [id] => 8866133 [patent_doc_number] => 20130149836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'METHOD OF DOUBLE-SIDED PATTERNING' [patent_app_type] => utility [patent_app_number] => 13/712059 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3369 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712059 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712059
Method of double-sided patterning Dec 11, 2012 Issued
Array ( [id] => 9989566 [patent_doc_number] => 09034769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-19 [patent_title] => 'Methods of selectively removing a substrate material' [patent_app_type] => utility [patent_app_number] => 13/712699 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5166 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712699 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712699
Methods of selectively removing a substrate material Dec 11, 2012 Issued
Array ( [id] => 9300147 [patent_doc_number] => 08648377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Semiconductor light-emitting device' [patent_app_type] => utility [patent_app_number] => 13/705342 [patent_app_country] => US [patent_app_date] => 2012-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3291 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13705342 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/705342
Semiconductor light-emitting device Dec 4, 2012 Issued
Array ( [id] => 9113664 [patent_doc_number] => 08569843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/689397 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6926 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689397 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/689397
Semiconductor device Nov 28, 2012 Issued
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