Search

Aaron A. Dehne

Examiner (ID: 4437, Phone: (571)270-7880 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
2829, 4116
Total Applications
304
Issued Applications
225
Pending Applications
0
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9026408 [patent_doc_number] => 08535989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Embedded semiconductive chips in reconstituted wafers, and systems containing same' [patent_app_type] => utility [patent_app_number] => 12/753637 [patent_app_country] => US [patent_app_date] => 2010-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6743 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12753637 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/753637
Embedded semiconductive chips in reconstituted wafers, and systems containing same Apr 1, 2010 Issued
Array ( [id] => 8446165 [patent_doc_number] => 08288216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Thin film transistor and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/753732 [patent_app_country] => US [patent_app_date] => 2010-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12753732 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/753732
Thin film transistor and method of fabricating the same Apr 1, 2010 Issued
Array ( [id] => 8544041 [patent_doc_number] => 08319335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Power semiconductor module, power semiconductor module assembly and method for fabricating a power semiconductor module assembly' [patent_app_type] => utility [patent_app_number] => 12/752825 [patent_app_country] => US [patent_app_date] => 2010-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6382 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12752825 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/752825
Power semiconductor module, power semiconductor module assembly and method for fabricating a power semiconductor module assembly Mar 31, 2010 Issued
Array ( [id] => 8071825 [patent_doc_number] => 20110241109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'Power NLDMOS array with enhanced self-protection' [patent_app_type] => utility [patent_app_number] => 12/798270 [patent_app_country] => US [patent_app_date] => 2010-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2059 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241109.pdf [firstpage_image] =>[orig_patent_app_number] => 12798270 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/798270
Power NLDMOS array with enhanced self-protection Mar 31, 2010 Abandoned
Array ( [id] => 6143671 [patent_doc_number] => 20110129992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/647163 [patent_app_country] => US [patent_app_date] => 2009-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3854 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129992.pdf [firstpage_image] =>[orig_patent_app_number] => 12647163 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/647163
METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NON-VOLATILE MEMORY DEVICE Dec 23, 2009 Abandoned
Array ( [id] => 6398698 [patent_doc_number] => 20100178744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'MANUFACTURE METHOD FOR SEMICONDUCTOR DEVICE WHOSE GATE INSULATING FILM CONTAINS Hf AND O' [patent_app_type] => utility [patent_app_number] => 12/646233 [patent_app_country] => US [patent_app_date] => 2009-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2906 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20100178744.pdf [firstpage_image] =>[orig_patent_app_number] => 12646233 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/646233
MANUFACTURE METHOD FOR SEMICONDUCTOR DEVICE WHOSE GATE INSULATING FILM CONTAINS Hf AND O Dec 22, 2009 Abandoned
Array ( [id] => 8560121 [patent_doc_number] => 08334184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Polish to remove topography in sacrificial gate layer prior to gate patterning' [patent_app_type] => utility [patent_app_number] => 12/646450 [patent_app_country] => US [patent_app_date] => 2009-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5922 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12646450 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/646450
Polish to remove topography in sacrificial gate layer prior to gate patterning Dec 22, 2009 Issued
Array ( [id] => 6393461 [patent_doc_number] => 20100164105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/646173 [patent_app_country] => US [patent_app_date] => 2009-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2300 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20100164105.pdf [firstpage_image] =>[orig_patent_app_number] => 12646173 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/646173
Semiconductor device and method of manufacturing the same Dec 22, 2009 Issued
Array ( [id] => 6293158 [patent_doc_number] => 20100159679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'MANUFACTURING METHOD FOR EPITAXIAL WAFER' [patent_app_type] => utility [patent_app_number] => 12/645744 [patent_app_country] => US [patent_app_date] => 2009-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8108 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20100159679.pdf [firstpage_image] =>[orig_patent_app_number] => 12645744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/645744
Manufacturing method for epitaxial wafer Dec 22, 2009 Issued
Array ( [id] => 9299677 [patent_doc_number] => 08647903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Method of fabricating antireflective grating pattern and method of fabricating optical device integrated with antireflective grating pattern' [patent_app_type] => utility [patent_app_number] => 12/999148 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 7284 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12999148 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/999148
Method of fabricating antireflective grating pattern and method of fabricating optical device integrated with antireflective grating pattern Dec 21, 2009 Issued
Array ( [id] => 8435496 [patent_doc_number] => 08283265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Method to enhance charge trapping' [patent_app_type] => utility [patent_app_number] => 12/640760 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4567 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12640760 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640760
Method to enhance charge trapping Dec 16, 2009 Issued
Array ( [id] => 8202811 [patent_doc_number] => 08188515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/640560 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5344 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/188/08188515.pdf [firstpage_image] =>[orig_patent_app_number] => 12640560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640560
Semiconductor device Dec 16, 2009 Issued
Array ( [id] => 6392780 [patent_doc_number] => 20100163965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'FLASH MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/640600 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5816 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20100163965.pdf [firstpage_image] =>[orig_patent_app_number] => 12640600 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640600
FLASH MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME Dec 16, 2009 Abandoned
Array ( [id] => 6393110 [patent_doc_number] => 20100164035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'BACK SIDE ILLUMINATON IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/640822 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20100164035.pdf [firstpage_image] =>[orig_patent_app_number] => 12640822 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640822
Back side illumination image sensor and method for manufacturing the same Dec 16, 2009 Issued
Array ( [id] => 5963125 [patent_doc_number] => 20110147765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'DUMMY STRUCTURE FOR ISOLATING DEVICES IN INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/640700 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9484 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147765.pdf [firstpage_image] =>[orig_patent_app_number] => 12640700 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640700
Dummy structure for isolating devices in integrated circuits Dec 16, 2009 Issued
Array ( [id] => 6446841 [patent_doc_number] => 20100038645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'Display Element and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 12/582964 [patent_app_country] => US [patent_app_date] => 2009-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3166 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20100038645.pdf [firstpage_image] =>[orig_patent_app_number] => 12582964 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/582964
Display element and method of manufacturing the same Oct 20, 2009 Issued
Array ( [id] => 5955790 [patent_doc_number] => 20110180849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/122108 [patent_app_country] => US [patent_app_date] => 2009-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 77 [patent_figures_cnt] => 77 [patent_no_of_words] => 31947 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180849.pdf [firstpage_image] =>[orig_patent_app_number] => 13122108 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/122108
SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE Sep 30, 2009 Abandoned
Array ( [id] => 6106010 [patent_doc_number] => 20110186911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/122107 [patent_app_country] => US [patent_app_date] => 2009-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 89 [patent_figures_cnt] => 89 [patent_no_of_words] => 35837 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20110186911.pdf [firstpage_image] =>[orig_patent_app_number] => 13122107 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/122107
SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE Sep 30, 2009 Abandoned
Array ( [id] => 5955869 [patent_doc_number] => 20110180903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/122103 [patent_app_country] => US [patent_app_date] => 2009-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 85 [patent_figures_cnt] => 85 [patent_no_of_words] => 35645 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180903.pdf [firstpage_image] =>[orig_patent_app_number] => 13122103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/122103
SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE Sep 30, 2009 Abandoned
Array ( [id] => 6004056 [patent_doc_number] => 20110057259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'METHOD FOR FORMING A THICK BOTTOM OXIDE (TBO) IN A TRENCH MOSFET' [patent_app_type] => utility [patent_app_number] => 12/554326 [patent_app_country] => US [patent_app_date] => 2009-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2076 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20110057259.pdf [firstpage_image] =>[orig_patent_app_number] => 12554326 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/554326
METHOD FOR FORMING A THICK BOTTOM OXIDE (TBO) IN A TRENCH MOSFET Sep 3, 2009 Abandoned
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