
Abbigale A. Boyle
Examiner (ID: 6386, Phone: (571)270-7919 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2899, 2891, 2816 |
| Total Applications | 419 |
| Issued Applications | 231 |
| Pending Applications | 66 |
| Abandoned Applications | 139 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10270250
[patent_doc_number] => 20150155247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-04
[patent_title] => 'BRIDGE STRUCTURE FOR EMBEDDING SEMICONDUCTOR DIE'
[patent_app_type] => utility
[patent_app_number] => 14/546734
[patent_app_country] => US
[patent_app_date] => 2014-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8101
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546734
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/546734 | BRIDGE STRUCTURE FOR EMBEDDING SEMICONDUCTOR DIE | Nov 17, 2014 | Abandoned |
Array
(
[id] => 12109034
[patent_doc_number] => 09865522
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-09
[patent_title] => 'Composite heat sink structures'
[patent_app_type] => utility
[patent_app_number] => 14/546136
[patent_app_country] => US
[patent_app_date] => 2014-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 31
[patent_no_of_words] => 11488
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546136
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/546136 | Composite heat sink structures | Nov 17, 2014 | Issued |
Array
(
[id] => 10370421
[patent_doc_number] => 20150255426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-10
[patent_title] => 'SEMICONDUCTOR DEVICE WITH REDUCED WARPAGE'
[patent_app_type] => utility
[patent_app_number] => 14/546484
[patent_app_country] => US
[patent_app_date] => 2014-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4481
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546484
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/546484 | SEMICONDUCTOR DEVICE WITH REDUCED WARPAGE | Nov 17, 2014 | Abandoned |
Array
(
[id] => 10795078
[patent_doc_number] => 20160141235
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-19
[patent_title] => 'PRINTED CIRCUIT BOARD ASSEMBLY WITH IMAGE SENSOR MOUNTED THEREON'
[patent_app_type] => utility
[patent_app_number] => 14/543936
[patent_app_country] => US
[patent_app_date] => 2014-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 2816
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14543936
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/543936 | Printed circuit board assembly with image sensor mounted thereon | Nov 17, 2014 | Issued |
Array
(
[id] => 10294597
[patent_doc_number] => 20150179596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-25
[patent_title] => 'SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 14/543105
[patent_app_country] => US
[patent_app_date] => 2014-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3415
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14543105
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/543105 | SEMICONDUCTOR PACKAGE | Nov 16, 2014 | Abandoned |
Array
(
[id] => 10795077
[patent_doc_number] => 20160141234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-19
[patent_title] => 'INTEGRATED DEVICE PACKAGE COMPRISING SILICON BRIDGE IN PHOTO IMAGEABLE LAYER'
[patent_app_type] => utility
[patent_app_number] => 14/543560
[patent_app_country] => US
[patent_app_date] => 2014-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 14601
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14543560
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/543560 | INTEGRATED DEVICE PACKAGE COMPRISING SILICON BRIDGE IN PHOTO IMAGEABLE LAYER | Nov 16, 2014 | Abandoned |
Array
(
[id] => 10294554
[patent_doc_number] => 20150179553
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-25
[patent_title] => 'PRE-MOLDED INTEGRATED CIRCUIT PACKAGES'
[patent_app_type] => utility
[patent_app_number] => 14/536962
[patent_app_country] => US
[patent_app_date] => 2014-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4574
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14536962
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/536962 | Pre-molded integrated circuit packages | Nov 9, 2014 | Issued |
Array
(
[id] => 16048021
[patent_doc_number] => 10685894
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-16
[patent_title] => Semi-conductor module with an encapsulating cement mass that covers a semi-conductor component
[patent_app_type] => utility
[patent_app_number] => 15/034626
[patent_app_country] => US
[patent_app_date] => 2014-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2037
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15034626
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/034626 | Semi-conductor module with an encapsulating cement mass that covers a semi-conductor component | Oct 13, 2014 | Issued |
Array
(
[id] => 9857954
[patent_doc_number] => 20150037971
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-05
[patent_title] => 'CHIP CONNECTION STRUCTURE AND METHOD OF FORMING'
[patent_app_type] => utility
[patent_app_number] => 14/510426
[patent_app_country] => US
[patent_app_date] => 2014-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2658
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14510426
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/510426 | CHIP CONNECTION STRUCTURE AND METHOD OF FORMING | Oct 8, 2014 | Abandoned |
Array
(
[id] => 10213199
[patent_doc_number] => 20150098191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-09
[patent_title] => 'Silicon Heat-Dissipation Package For Compact Electronic Devices'
[patent_app_type] => utility
[patent_app_number] => 14/507779
[patent_app_country] => US
[patent_app_date] => 2014-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 11711
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14507779
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/507779 | Silicon Heat-Dissipation Package For Compact Electronic Devices | Oct 5, 2014 | Abandoned |
Array
(
[id] => 10909461
[patent_doc_number] => 20140312477
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-23
[patent_title] => 'Lead And Lead Frame For Power Package'
[patent_app_type] => utility
[patent_app_number] => 14/320644
[patent_app_country] => US
[patent_app_date] => 2014-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3471
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14320644
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/320644 | Lead and lead frame for power package | Jun 30, 2014 | Issued |
Array
(
[id] => 10479377
[patent_doc_number] => 20150364394
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'Method for Building Up a Fan-Out RDL Structure with Fine Pitch Line-Width and Line-Spacing'
[patent_app_type] => utility
[patent_app_number] => 14/305640
[patent_app_country] => US
[patent_app_date] => 2014-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 13549
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14305640
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/305640 | Method for building up a fan-out RDL structure with fine pitch line-width and line-spacing | Jun 15, 2014 | Issued |
Array
(
[id] => 10479356
[patent_doc_number] => 20150364373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'Quad Flat No Lead Package And Method Of Making'
[patent_app_type] => utility
[patent_app_number] => 14/301942
[patent_app_country] => US
[patent_app_date] => 2014-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2326
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14301942
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/301942 | Quad flat no lead package and method of making | Jun 10, 2014 | Issued |
Array
(
[id] => 10472252
[patent_doc_number] => 20150357268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-10
[patent_title] => 'POWER SEMICONDUCTOR DEVICE WITH SMALL CONTACT FOOTPRINT AND THE PREPARATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/298892
[patent_app_country] => US
[patent_app_date] => 2014-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5588
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298892
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/298892 | Power semiconductor device with small contact footprint and the preparation method | Jun 6, 2014 | Issued |
Array
(
[id] => 12334905
[patent_doc_number] => 09947636
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-17
[patent_title] => Method for making semiconductor device with lead frame made from top and bottom components and related devices
[patent_app_type] => utility
[patent_app_number] => 14/293274
[patent_app_country] => US
[patent_app_date] => 2014-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2737
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293274
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/293274 | Method for making semiconductor device with lead frame made from top and bottom components and related devices | Jun 1, 2014 | Issued |
Array
(
[id] => 10943633
[patent_doc_number] => 20140346654
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-27
[patent_title] => 'CHIP PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 14/293782
[patent_app_country] => US
[patent_app_date] => 2014-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5516
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293782
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/293782 | CHIP PACKAGE | Jun 1, 2014 | Abandoned |
Array
(
[id] => 11265844
[patent_doc_number] => 09490146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Semiconductor device with encapsulated lead frame contact area and related methods'
[patent_app_type] => utility
[patent_app_number] => 14/293364
[patent_app_country] => US
[patent_app_date] => 2014-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2422
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293364
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/293364 | Semiconductor device with encapsulated lead frame contact area and related methods | Jun 1, 2014 | Issued |
Array
(
[id] => 9716872
[patent_doc_number] => 20140252570
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-11
[patent_title] => 'LEAD-FRAME CIRCUIT PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 14/285079
[patent_app_country] => US
[patent_app_date] => 2014-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4890
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14285079
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/285079 | LEAD-FRAME CIRCUIT PACKAGE | May 21, 2014 | Abandoned |
Array
(
[id] => 9631908
[patent_doc_number] => 20140210017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-31
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/243358
[patent_app_country] => US
[patent_app_date] => 2014-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 9363
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243358
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/243358 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | Apr 1, 2014 | Abandoned |
Array
(
[id] => 10479410
[patent_doc_number] => 20150364427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/762595
[patent_app_country] => US
[patent_app_date] => 2014-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6555
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14762595
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/762595 | Semiconductor device and method for manufacturing same | Jan 22, 2014 | Issued |